Re: [Qemu-devel] New emulator: MIPS-user

["J. Mayer" <l_indien@magic.fr>]

[-- Attachment #1: Type: text/plain, Size: 1778 bytes --]

On Fri, 2005-02-11 at 16:19, Jason McMullan wrote:
> On Fri, 2005-02-11 at 15:17 +0100, J. Mayer wrote:
> > As I was reworking some parts of this code, my current version may be
> > quite broken.
> > So, I'll take a close look this week-end and send you a snapshot.
> 
> Broken I can handle (my 'mips64.spec' was taken pretty much directly
>  from the manuals, so I can use it as a verification suite on your
> code).
> 
> Anyway, any start you already have would be good for me, even if it's
> just a reference.

Here's a snapshot of a quite outdated version of my mips emulation. But
this version is, I think, very near from the one that did boot Linux.
This will give an idea of how I did it.
Don't care too much about the CALL_FROM_TB macros, which are not
specially related to mips emulation.

What I did since this version is mainly:
- debugging
- remove quite all #ifdef, using a features field in the CPUMIPSState
structure.
- start implementing mips16 opcodes
- try using some generic micro-ops: the goal here is not to re-implement
the same simple micro-operations for all emulated targets. This is the
patch that isn't finished and broke my code...

The hardware implemented is very simple: it's just the interrupt
controler + a serial port. I also implemented MIPS R4Kc like MMU (which,
I think, is not completely finished/debugged in this version).
I didn't make anything to emulate mipsel targets. I only did big-endian
support, but little-endian is planned and would not be very hard to add.
I can't release the BIOS I used for my tests, as it's not open-source,
but one could patch yamon and make it boot (or start booting) Linux.

Here's the diff with the current qemu CVS + a bzip'ed tarball of all new
files.

-- 
J. Mayer <l_indien@magic.fr>
Never organized

[-- Attachment #2: target-mips.diff --]
[-- Type: text/x-patch, Size: 17246 bytes --]

Index: Makefile.target
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile.target,v
retrieving revision 1.57
diff -u -d -w -B -b -d -p -r1.57 Makefile.target
--- Makefile.target	10 Feb 2005 21:48:51 -0000	1.57
+++ Makefile.target	13 Feb 2005 15:23:30 -0000
@@ -78,13 +78,33 @@ PROGS+=$(QEMU_SYSTEM)
 endif
 endif # ARCH = i386
 
+ifeq ($(ARCH), amd64)
+ifdef CONFIG_SOFTMMU
+PROGS+=$(QEMU_SYSTEM)
+endif
+endif # ARCH = amd64
+
+endif # TARGET_ARCH = ppc
+
+ifeq ($(TARGET_ARCH), mips)
+
+ifeq ($(ARCH), ppc)
+PROGS+=$(QEMU_SYSTEM)
+endif
+
+ifeq ($(ARCH), i386)
+ifdef CONFIG_SOFTMMU
+PROGS+=$(QEMU_SYSTEM)
+endif
+endif # ARCH = i386
+
 ifeq ($(ARCH), x86_64)
 ifdef CONFIG_SOFTMMU
 PROGS+=$(QEMU_SYSTEM)
 endif
 endif # ARCH = x86_64
 
-endif # TARGET_ARCH = ppc
+endif # TARGET_ARCH = mips
 
 ifeq ($(TARGET_ARCH), sparc)
 
@@ -255,6 +275,10 @@ ifeq ($(TARGET_ARCH), ppc)
 LIBOBJS+= op_helper.o helper.o
 endif
 
+ifeq ($(TARGET_ARCH), mips)
+LIBOBJS+= op_helper.o helper.o
+endif
+
 ifeq ($(TARGET_BASE_ARCH), sparc)
 LIBOBJS+= op_helper.o helper.o
 endif
@@ -276,6 +300,9 @@ endif
 ifeq ($(findstring ppc, $(TARGET_ARCH) $(ARCH)),ppc)
 LIBOBJS+=ppc-dis.o
 endif
+ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips)
+LIBOBJS+=mips-dis.o
+endif
 ifeq ($(findstring sparc, $(TARGET_BASE_ARCH) $(ARCH)),sparc)
 LIBOBJS+=sparc-dis.o
 endif
@@ -333,6 +360,10 @@ VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o v
 VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o
 VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o mixeng.o
 endif
+ifeq ($(TARGET_ARCH), mips)
+VL_OBJS+= mips.o mips_r4k.o dma.o vga.o serial.o #ide.o ne2000.o pckbd.o
+VL_OBJS+= #i8259.o i8254.o fdc.o m48t59.o
+endif
 ifeq ($(TARGET_BASE_ARCH), sparc)
 VL_OBJS+= sun4m.o tcx.o lance.o iommu.o m48t08.o magic-load.o slavio_intctl.o slavio_timer.o slavio_serial.o fdc.o
 endif
@@ -422,6 +453,11 @@ op.o: op.c op_template.h op_mem.h
 op_helper.o: op_helper_mem.h
 endif
 
+ifeq ($(TARGET_ARCH), mips)
+op.o: op.c op_template.c op_mem.c
+op_helper.o: op_helper_mem.c
+endif
+
 mixeng.o: mixeng.c mixeng.h mixeng_template.h
 
 %.o: %.c
Index: configure
===================================================================
RCS file: /cvsroot/qemu/qemu/configure,v
retrieving revision 1.55
diff -u -d -w -B -b -d -p -r1.55 configure
--- configure	12 Feb 2005 18:58:00 -0000	1.55
+++ configure	13 Feb 2005 15:23:31 -0000
@@ -200,7 +200,7 @@ fi
 
 if test -z "$target_list" ; then
 # these targets are portable
-    target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu sparc64-softmmu"
+    target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu sparc64-softmmu mips-softmmu"
 # the following are Linux specific
     if [ "$linux" = "yes" ] ; then
         target_list="i386-user arm-user armeb-user sparc-user ppc-user sparc64-user $target_list"
@@ -228,7 +228,7 @@ fi
 else
 
 # if cross compiling, cannot launch a program, so make a static guess
-if test "$cpu" = "powerpc" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64" -o "$cpu" = "m68k" -o "$cpu" = "armv4b"; then
+if test "$cpu" = "powerpc" -o "$cpu" = "powerpc64" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64" -o "$cpu" = "m68k" -o "$cpu" = "armv4b"; then
     bigendian="yes"
 fi
 
@@ -575,6 +575,7 @@ target_bigendian="no"
 [ "$target_cpu" = "sparc" ] && target_bigendian=yes
 [ "$target_cpu" = "sparc64" ] && target_bigendian=yes
 [ "$target_cpu" = "ppc" ] && target_bigendian=yes
+[ "$target_cpu" = "mips" ] && target_bigendian=yes
 target_softmmu="no"
 if expr $target : '.*-softmmu' > /dev/null ; then
   target_softmmu="yes"
@@ -635,6 +636,10 @@ elif test "$target_cpu" = "x86_64" ; the
   echo "#define TARGET_ARCH \"x86_64\"" >> $config_h
   echo "#define TARGET_I386 1" >> $config_h
   echo "#define TARGET_X86_64 1" >> $config_h
+elif test "$target_cpu" = "mips" ; then
+  echo "TARGET_ARCH=mips" >> $config_mak
+  echo "#define TARGET_ARCH \"mips\"" >> $config_h
+  echo "#define TARGET_MIPS 1" >> $config_h
 else
   echo "Unsupported target CPU"
   exit 1
Index: cpu-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-all.h,v
retrieving revision 1.41
diff -u -d -w -B -b -d -p -r1.41 cpu-all.h
--- cpu-all.h	10 Feb 2005 21:56:58 -0000	1.41
+++ cpu-all.h	13 Feb 2005 15:23:31 -0000
@@ -616,6 +616,13 @@ void page_unprotect_range(uint8_t *data,
 #define cpu_gen_code cpu_ppc_gen_code
 #define cpu_signal_handler cpu_ppc_signal_handler
 
+#elif defined(TARGET_MIPS)
+#define CPUState CPUMIPSState
+#define cpu_init cpu_mips_init
+#define cpu_exec cpu_mips_exec
+#define cpu_gen_code cpu_mips_gen_code
+#define cpu_signal_handler cpu_mips_signal_handler
+
 #else
 
 #error unsupported target CPU
Index: cpu-exec.c
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-exec.c,v
retrieving revision 1.48
diff -u -d -w -B -b -d -p -r1.48 cpu-exec.c
--- cpu-exec.c	10 Feb 2005 22:04:41 -0000	1.48
+++ cpu-exec.c	13 Feb 2005 15:23:31 -0000
@@ -165,6 +165,7 @@ int cpu_exec(CPUState *env1)
     }
 #elif defined(TARGET_SPARC)
 #elif defined(TARGET_PPC)
+#elif defined(TARGET_MIPS)
 #else
 #error unsupported target CPU
 #endif
@@ -203,6 +204,8 @@ int cpu_exec(CPUState *env1)
                                  env->exception_next_eip, 0);
 #elif defined(TARGET_PPC)
                     do_interrupt(env);
+#elif defined(TARGET_MIPS)
+                    do_interrupt(env);
 #elif defined(TARGET_SPARC)
                     do_interrupt(env->exception_index, 
                                  env->error_code);
@@ -285,6 +288,19 @@ int cpu_exec(CPUState *env1)
                             env->interrupt_request &= ~CPU_INTERRUPT_TIMER;
 			}
                     }
+#elif defined(TARGET_MIPS)
+                    if ((interrupt_request & CPU_INTERRUPT_HARD) &&
+                        (env->CP0_Status & (1 << CP0St_IE)) &&
+                        (env->CP0_Cause & 0x0000FC00) &&
+                        !(env->hflags & MIPS_HFLAG_EXL) &&
+                        !(env->hflags & MIPS_HFLAG_ERL) &&
+                        !(env->hflags & MIPS_HFLAG_DM)) {
+                        /* Raise it */
+                        env->exception_index = EXCP_EXT_INTERRUPT;
+                        env->error_code = 0;
+                        do_interrupt(env);
+                        env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+                    }
 #elif defined(TARGET_SPARC)
                     if (interrupt_request & CPU_INTERRUPT_HARD) {
 			do_interrupt(env->interrupt_index, 0);
@@ -333,6 +349,8 @@ int cpu_exec(CPUState *env1)
                     cpu_dump_state (env, logfile, fprintf, 0);
 #elif defined(TARGET_PPC)
                     cpu_dump_state(env, logfile, fprintf, 0);
+#elif defined(TARGET_MIPS)
+                    cpu_dump_state(env, logfile, fprintf, 0);
 #else
 #error unsupported target CPU 
 #endif
@@ -355,6 +373,10 @@ int cpu_exec(CPUState *env1)
                 flags = 0;
                 cs_base = 0;
                 pc = env->nip;
+#elif defined(TARGET_MIPS)
+                flags = env->hflags & MIPS_HFLAGS_TMASK;
+                cs_base = NULL;
+                pc = env->PC;
 #else
 #error unsupported CPU
 #endif
@@ -622,6 +663,7 @@ int cpu_exec(CPUState *env1)
     env->cpsr = compute_cpsr();
 #elif defined(TARGET_SPARC)
 #elif defined(TARGET_PPC)
+#elif defined(TARGET_MIPS)
 #else
 #error unsupported target CPU
 #endif
@@ -871,6 +913,57 @@ static inline int handle_cpu_signal(unsi
     /* never comes here */
     return 1;
 }
+
+#elif defined (TARGET_MIPS)
+static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
+                                    int is_write, sigset_t *old_set,
+                                    void *puc)
+{
+    TranslationBlock *tb;
+    int ret;
+    
+    if (cpu_single_env)
+        env = cpu_single_env; /* XXX: find a correct solution for multithread */
+#if defined(DEBUG_SIGNAL)
+    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
+           pc, address, is_write, *(unsigned long *)old_set);
+#endif
+    /* XXX: locking issue */
+    if (is_write && page_unprotect(address, pc, puc)) {
+        return 1;
+    }
+
+    /* see if it is an MMU fault */
+    ret = cpu_ppc_handle_mmu_fault(env, address, is_write, msr_pr, 0);
+    if (ret < 0)
+        return 0; /* not an MMU fault */
+    if (ret == 0)
+        return 1; /* the MMU fault was handled without causing real CPU fault */
+
+    /* now we have a real cpu fault */
+    tb = tb_find_pc(pc);
+    if (tb) {
+        /* the PC is inside the translated code. It means that we have
+           a virtual CPU fault */
+        cpu_restore_state(tb, env, pc, puc);
+    }
+    if (ret == 1) {
+#if 0
+        printf("PF exception: NIP=0x%08x error=0x%x %p\n", 
+               env->nip, env->error_code, tb);
+#endif
+    /* we restore the process signal mask as the sigreturn should
+       do it (XXX: use sigsetjmp) */
+        sigprocmask(SIG_SETMASK, old_set, NULL);
+        do_raise_exception_err(env->exception_index, env->error_code);
+    } else {
+        /* activate soft MMU for this block */
+        cpu_resume_from_signal(env, puc);
+    }
+    /* never comes here */
+    return 1;
+}
+
 #else
 #error unsupported target CPU
 #endif
Index: dis-asm.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dis-asm.h,v
retrieving revision 1.7
diff -u -d -w -B -b -d -p -r1.7 dis-asm.h
--- dis-asm.h	3 Jan 2005 23:35:10 -0000	1.7
+++ dis-asm.h	13 Feb 2005 15:23:32 -0000
@@ -404,6 +404,8 @@ extern int generic_symbol_at_address
 
 bfd_vma bfd_getl32 (const bfd_byte *addr);
 bfd_vma bfd_getb32 (const bfd_byte *addr);
+bfd_vma bfd_getl16 (const bfd_byte *addr);
+bfd_vma bfd_getb16 (const bfd_byte *addr);
 typedef enum bfd_boolean {false, true} boolean;
 
 #endif /* ! defined (DIS_ASM_H) */
Index: disas.c
===================================================================
RCS file: /cvsroot/qemu/qemu/disas.c,v
retrieving revision 1.19
diff -u -d -w -B -b -d -p -r1.19 disas.c
--- disas.c	31 Jan 2005 23:32:31 -0000	1.19
+++ disas.c	13 Feb 2005 15:23:32 -0000
@@ -108,6 +108,24 @@ bfd_vma bfd_getb32 (const bfd_byte *addr
   return (bfd_vma) v;
 }
 
+bfd_vma bfd_getl16 (const bfd_byte *addr)
+{
+  unsigned long v;
+
+  v = (unsigned long) addr[0];
+  v |= (unsigned long) addr[1] << 8;
+  return (bfd_vma) v;
+}
+
+bfd_vma bfd_getb16 (const bfd_byte *addr)
+{
+  unsigned long v;
+
+  v = (unsigned long) addr[0] << 24;
+  v |= (unsigned long) addr[1] << 16;
+  return (bfd_vma) v;
+}
+
 /* Disassemble this for me please... (debugging). 'flags' is only used
    for i386: non zero means 16 bit code */
 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
@@ -142,6 +160,8 @@ void target_disas(FILE *out, target_ulon
     print_insn = print_insn_sparc;
 #elif defined(TARGET_PPC)
     print_insn = print_insn_ppc;
+#elif defined(TARGET_MIPS)
+    print_insn = print_insn_big_mips;
 #else
     fprintf(out, "Asm output not supported on this arch\n");
     return;
@@ -310,6 +330,8 @@ void monitor_disas(target_ulong pc, int 
     print_insn = print_insn_sparc;
 #elif defined(TARGET_PPC)
     print_insn = print_insn_ppc;
+#elif defined(TARGET_MIPS)
+    print_insn = print_insn_big_mips;
 #else
     term_printf("Asm output not supported on this arch\n");
     return;
Index: dyngen-exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen-exec.h,v
retrieving revision 1.20
diff -u -d -w -B -b -d -p -r1.20 dyngen-exec.h
--- dyngen-exec.h	26 Jan 2005 21:30:57 -0000	1.20
+++ dyngen-exec.h	13 Feb 2005 15:23:32 -0000
@@ -246,4 +246,28 @@ extern int __op_jmp0, __op_jmp1, __op_jm
 #define EXIT_TB() asm volatile ("rts")
 #endif
 
+#ifndef CALL_FROM_TB0
+#define CALL_FROM_TB0(func) func();
+#endif
+#ifndef CALL_FROM_TB1
+#define CALL_FROM_TB1(func, arg0) func(arg0);
+#endif
+#ifndef CALL_FROM_TB1_CONST16
+#define CALL_FROM_TB1_CONST16(func, arg0) CALL_FROM_TB1(func, arg0);
+#endif
+#ifndef CALL_FROM_TB2
+#define CALL_FROM_TB2(func, arg0, arg1) func(arg0, arg1);
+#endif
+#ifndef CALL_FROM_TB2_CONST16
+#define CALL_FROM_TB2_CONST16(func, arg0, arg1)     \
+CALL_FROM_TB2(func, arg0, arg1);
+#endif
+#ifndef CALL_FROM_TB3
+#define CALL_FROM_TB3(func, arg0, arg1, arg2) func(arg0, arg1, arg2);
+#endif
+#ifndef CALL_FROM_TB4
+#define CALL_FROM_TB4(func, arg0, arg1, arg2, arg3) \
+        func(arg0, arg1, arg2, arg3);
+#endif
+
 #endif /* !defined(__DYNGEN_EXEC_H__) */
Index: elf.h
===================================================================
RCS file: /cvsroot/qemu/qemu/elf.h,v
retrieving revision 1.5
diff -u -d -w -B -b -d -p -r1.5 elf.h
--- elf.h	29 Apr 2003 21:06:46 -0000	1.5
+++ elf.h	13 Feb 2005 15:23:33 -0000
@@ -31,11 +31,29 @@ typedef int64_t  Elf64_Sxword;
 #define PT_LOPROC  0x70000000
 #define PT_HIPROC  0x7fffffff
 #define PT_MIPS_REGINFO		0x70000000
+#define PT_MIPS_OPTIONS		0x70000001
 
 /* Flags in the e_flags field of the header */
+/* MIPS architecture level. */
+#define EF_MIPS_ARCH_1		0x00000000	/* -mips1 code.  */
+#define EF_MIPS_ARCH_2		0x10000000	/* -mips2 code.  */
+#define EF_MIPS_ARCH_3		0x20000000	/* -mips3 code.  */
+#define EF_MIPS_ARCH_4		0x30000000	/* -mips4 code.  */
+#define EF_MIPS_ARCH_5		0x40000000	/* -mips5 code.  */
+#define EF_MIPS_ARCH_32		0x50000000	/* MIPS32 code.  */
+#define EF_MIPS_ARCH_64		0x60000000	/* MIPS64 code.  */
+
+/* The ABI of a file. */
+#define EF_MIPS_ABI_O32		0x00001000	/* O32 ABI.  */
+#define EF_MIPS_ABI_O64		0x00002000	/* O32 extended for 64 bit.  */
+
 #define EF_MIPS_NOREORDER 0x00000001
 #define EF_MIPS_PIC       0x00000002
 #define EF_MIPS_CPIC      0x00000004
+#define EF_MIPS_ABI2		0x00000020
+#define EF_MIPS_OPTIONS_FIRST	0x00000080
+#define EF_MIPS_32BITMODE	0x00000100
+#define EF_MIPS_ABI		0x0000f000
 #define EF_MIPS_ARCH      0xf0000000
 
 /* These constants define the different elf file types */
Index: exec-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-all.h,v
retrieving revision 1.28
diff -u -d -w -B -b -d -p -r1.28 exec-all.h
--- exec-all.h	10 Feb 2005 22:02:59 -0000	1.28
+++ exec-all.h	13 Feb 2005 15:23:34 -0000
@@ -570,6 +570,8 @@ static inline target_ulong get_phys_addr
     is_user = ((env->hflags & HF_CPL_MASK) == 3);
 #elif defined (TARGET_PPC)
     is_user = msr_pr;
+#elif defined (TARGET_MIPS)
+    is_user = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);
 #elif defined (TARGET_SPARC)
     is_user = (env->psrs == 0);
 #else
Index: softmmu_header.h
===================================================================
RCS file: /cvsroot/qemu/qemu/softmmu_header.h,v
retrieving revision 1.8
diff -u -d -w -B -b -d -p -r1.8 softmmu_header.h
--- softmmu_header.h	3 Jan 2005 23:35:10 -0000	1.8
+++ softmmu_header.h	13 Feb 2005 15:23:34 -0000
@@ -55,6 +55,8 @@
 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
 #elif defined (TARGET_PPC)
 #define CPU_MEM_INDEX (msr_pr)
+#elif defined (TARGET_MIPS)
+#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
 #elif defined (TARGET_SPARC)
 #define CPU_MEM_INDEX ((env->psrs) == 0)
 #endif
@@ -66,6 +68,8 @@
 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
 #elif defined (TARGET_PPC)
 #define CPU_MEM_INDEX (msr_pr)
+#elif defined (TARGET_MIPS)
+#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
 #elif defined (TARGET_SPARC)
 #define CPU_MEM_INDEX ((env->psrs) == 0)
 #endif
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.120
diff -u -d -w -B -b -d -p -r1.120 vl.c
--- vl.c	10 Feb 2005 22:00:06 -0000	1.120
+++ vl.c	13 Feb 2005 15:23:35 -0000
@@ -2321,6 +2321,17 @@ int cpu_load(QEMUFile *f, void *opaque, 
 {
     return 0;
 }
+
+#elif defined(TARGET_MIPS)
+void cpu_save(QEMUFile *f, void *opaque)
+{
+}
+
+int cpu_load(QEMUFile *f, void *opaque, int version_id)
+{
+    return 0;
+}
+
 #elif defined(TARGET_SPARC)
 void cpu_save(QEMUFile *f, void *opaque)
 {
@@ -3376,10 +3387,11 @@ int main(int argc, char **argv)
 
     linux_boot = (kernel_filename != NULL);
         
+#if !defined(TARGET_MIPS) /* Don't have any disk on mips for now */
     if (!linux_boot && hd_filename[0] == '\0' && hd_filename[2] == '\0' &&
         fd_filename[0] == '\0')
         help();
-    
+#endif
     /* boot to cd by default if no hard disk */
     if (hd_filename[0] == '\0' && boot_device == 'c') {
         if (fd_filename[0] != '\0')
@@ -3645,6 +3657,10 @@ int main(int argc, char **argv)
     ppc_init(ram_size, vga_ram_size, boot_device,
 	     ds, fd_filename, snapshot,
 	     kernel_filename, kernel_cmdline, initrd_filename);
+#elif defined(TARGET_MIPS)
+    mips_init(ram_size, vga_ram_size, boot_device,
+              ds, fd_filename, snapshot,
+              kernel_filename, kernel_cmdline, initrd_filename);
 #elif defined(TARGET_SPARC)
     sun4m_init(ram_size, vga_ram_size, boot_device,
             ds, fd_filename, snapshot,

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