[Qemu-devel] [PATCH] qemu PPC Linux 2.6 IDE

[Thayne Harbaugh <thayne@realmsys.com>]

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I have qemu PPC booting Linux 2.6.  Here's a patch for IDE.

IDE detection of macio has changed significantly.  2.4
drivers/ide/ppc/pmac.c:pmac_ide_probe() simply looked for the IDE/ATA
controllers in OF.  2.6 pmac.c:pmace_ide_probe() registers macio device
filters for IDE/ATA and relies on macio device enumeration to connect to
the IDE driver.  Where things are broken is that
drivers/macintosh/macio_asic.c:macio_pci_probe() fails to match the
macio device due to the bus:devfn not being set as a "reg" property in
OHW.

There are two questions about this patch:

* What is the complete information expected in the "reg" property of a
PCI device?

* Where should the current macio "reg" information really be stored, if
at all?

I should be able to investigate the above two questions in the next few
days.

A fix for 2.6 FB should be soon.


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Index: src/bios.h
===================================================================
--- src/bios.h	(revision 89)
+++ src/bios.h	(working copy)
@@ -405,7 +405,7 @@
                               uint8_t devfn, uint8_t rev, uint32_t ccode,
                               uint16_t min_grant, uint16_t max_latency);
 void *OF_register_pci_device (void *parent, pci_dev_t *dev,
-                              uint8_t devfn, uint8_t rev, uint32_t ccode,
+                              uint8_t bus, uint8_t devfn, uint8_t rev, uint32_t ccode,
                               uint16_t min_grant, uint16_t max_latency);
 void OF_finalize_pci_host (void *dev, int first_bus, int nb_busses);
 void OF_finalize_pci_device (void *dev, uint32_t *regions, uint32_t *sizes);
Index: src/pci.c
===================================================================
--- src/pci.c	(revision 89)
+++ src/pci.c	(working copy)
@@ -1908,12 +1914,12 @@
     /* register PCI device in OF tree */
     if (bridge->dev.common.type == PCI_FAKE_BRIDGE) {
         newd->common.OF_private =
-            OF_register_pci_device(host->dev.common.OF_private, dev, devfn,
+            OF_register_pci_device(host->dev.common.OF_private, dev, bus, devfn,
                                    rev, ccode, min_grant, max_latency);
     } else {
         newd->common.OF_private =
-            OF_register_pci_device(bridge->dev.common.OF_private, dev, devfn,
+            OF_register_pci_device(bridge->dev.common.OF_private, dev, bus, devfn,
                                    rev, ccode, min_grant, max_latency);
     }
  configure_device:
Index: src/of.c
===================================================================
--- src/of.c	(revision 90)
+++ src/of.c	(working copy)
@@ -2122,10 +2125,11 @@
 
 __attribute__ (( section (".OpenFirmware") ))
 void *OF_register_pci_device (void *parent, pci_dev_t *dev,
-                              uint8_t devfn, uint8_t rev, uint32_t ccode,
+                              uint8_t bus, uint8_t devfn, uint8_t rev, uint32_t ccode,
                               uint16_t min_grant, uint16_t max_latency)
 {
     OF_env_t *OF_env;
+    OF_regprop_t regs[1];
     OF_node_t *pci_dev;
 
     OF_env = OF_env_main;
@@ -2134,6 +2138,10 @@
     pci_dev = OF_pci_device_new(OF_env, parent, dev, devfn >> 3,
                                 rev, ccode, min_grant, max_latency);
 
+    /* FIXME - this likely isn't complete: low 8 and high 8 of the 32 bits? */
+    regs[0].address = (bus << 16) | (devfn << 8);
+    OF_property_new(OF_env, pci_dev, "reg", regs, sizeof(OF_regprop_t));
+
     return pci_dev;
 }
 
@@ -2347,7 +2355,8 @@
     pregs[0].addr.lo = 0x00000000;
     pregs[0].size_hi = 0x00000000;
     pregs[0].size_lo = size;
-    OF_property_new(OF_env, mio, "reg",
+    /* FIXME - pregs can't be property "reg" because bus:devfn is expected in "reg" */
+    OF_property_new(OF_env, mio, "preg",
                     &pregs, 2 * sizeof(pci_reg_prop_t));
 #endif
     pregs[0].addr.hi = 0x00000000;