Re: looking for help with scomc/scomd registers on 970

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Thu, 2005-02-24 at 10:54 -0600, Chris Friesen wrote:
> Not strictly linux related, but I thought someone might know the answer.
> 
> I've got a request from someone that wants to be able to flush the L2 on 
> the 970.
> 
> The user manual has a procedure to do this, but it involves first 
> flipping the cache to direct-mapped mode by setting SCOM register 
> 0x43000 bit 0x8000.  The only thing is, I can't find any linux code that 
> ever touches the SCOM stuff, and the manual has no examples of *reading* 
> from the SCOM area, just writing to it, so I'm not entirely sure how to 
> do that.
> 
> A google search found the following snippet of darwin code:
> 
> 
> lis r8,cFIR ; Get the Core FIR register address
> ori r8,r8,0x8000 ; Set to read data
> sync
> mtspr scomc,r8 ; Request the Core FIR
> mfspr r25,scomd ; Get the source
> mfspr r8,scomc ; Get back the status (we just ignore it)
> sync
> isync	
> 			
> 
> 
> This implies that bit 0x8000 needs to be set to specify a read command, 
> and that we need to read the status after the read.  Does anyone know if 
> this is in fact the case?

I think so. Also, there are some erratas with early 970's where the
stuff is shifted one bit. The Darwin source is a good reference for
that.

> Also, in that code they make reference to early chip revisions that 
> returned scom reads shifted by one bit.  Does anyone know which versions 
> are affected?

I think all non-FX.

Ben.