From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Andrew Morton <akpm@osdl.org>,
linuxppc-dev list <linuxppc-dev@ozlabs.org>,
Linux Kernel list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ppc32/64: Map prefetchable PCI without guarded bit
Date: Sat, 26 Mar 2005 09:26:52 +1100 [thread overview]
Message-ID: <1111789613.5569.69.camel@gaston> (raw)
In-Reply-To: <6ab08e99eb9f0823f7f7fb12e728e90d@kernel.crashing.org>
On Thu, 2005-03-24 at 19:20 +0100, Segher Boessenkool wrote:
> > While experimenting with framebuffer access performances, we noticed a
> > very significant improvement in write access to it when not setting
> > the "guarded" bit on the MMU mappings. This bit basically says that
> > reads and writes won't have side effects (it allows speculation).
>
> Unless the data is already in cache.
>
> > It appears that it also disables write combining.
>
> When the page is also cache-inhibited, it indeed does.
>
>
> Btw, did you ever get to fix the problem with mapping the last page
> of physical address space via /dev/mem ?
I don't think so, but I'll have to double check.
Ben.
prev parent reply other threads:[~2005-03-25 22:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-03-24 6:24 [PATCH] ppc32/64: Map prefetchable PCI without guarded bit Benjamin Herrenschmidt
2005-03-24 16:54 ` Jesse Barnes
2005-03-24 16:55 ` Jesse Barnes
2005-03-25 22:23 ` Benjamin Herrenschmidt
2005-03-24 18:20 ` Segher Boessenkool
2005-03-25 22:26 ` Benjamin Herrenschmidt [this message]
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