From: Olivier Fourdan <fourdan@xfce.org>
To: Robert Hancock <hancockr@shaw.ca>
Cc: linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: PATCH: Assume PM Timer to be reliable on broken board/BIOS
Date: Wed, 27 Jul 2005 07:32:24 +0200 [thread overview]
Message-ID: <1122442345.5849.5.camel@shuttle> (raw)
In-Reply-To: <42E6C86F.3010503@shaw.ca>
On Tue, 2005-07-26 at 17:34 -0600, Robert Hancock wrote:
> > In a nutshell, sometimes, the PIT/TSC timer runs 3x too fast [1]. That
> > causes many issues, including DMA errors, MCE, and clock running way too
> > fast (making the laptop unusable for any software development). So far,
> > no BIOS update was able to fix the issue for me.
>
> Shouldn't this be looked into further rather than adding this
> workaround? Surely Windows is using the PIT as well, so there must be
> some way to get it to behave properly..
Surely, but I've been desesperatly trying to find the cause w/out
success for months.
My first idea was that the BIOS doesn't set the CPU voltage properly at
boot, so I made up a patch that sets the right fid/vid before any
calibration but that didn't help.
The BIOS is wrong (ie the BIOS reports a 1/3 of the actual CPU speed),
memtest86+ which doesn't use any ACPI or whatever reports wrong time
too, so it's definitely not a Linux bug.
My guess is that Windows reinitialize some register but it's hard to
tell.
Cheers,
Olivier.
next prev parent reply other threads:[~2005-07-27 5:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <4uGpt-2Y3-15@gated-at.bofh.it>
2005-07-26 23:34 ` PATCH: Assume PM Timer to be reliable on broken board/BIOS Robert Hancock
2005-07-27 5:32 ` Olivier Fourdan [this message]
2005-08-10 20:29 ` Olivier Fourdan
2005-07-26 22:32 Olivier Fourdan
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