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diff for duplicates of <11224856632322@foobar.com>

diff --git a/a/1.txt b/N1/1.txt
index 4ca045b..885edba 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -5,8 +5,7 @@ reference platform.
 Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>
 Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
 
-diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bambo=
-o.c
+diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
 new file mode 100644
 --- /dev/null
 +++ b/arch/ppc/platforms/4xx/bamboo.c
@@ -79,9 +78,8 @@ new file mode 100644
 +/*
 + * Bamboo external IRQ triggering/polarity settings
 + */
-+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata =3D {
-+	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver =
-*/
++unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
++	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver */
 +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ1: Expansion connector */
 +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 0 */
 +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 1 */
@@ -99,12 +97,12 @@ new file mode 100644
 +	unsigned int freq;
 +
 +	if (mfspr(SPRN_CCR1) & CCR1_TCS)
-+		freq =3D BAMBOO_TMRCLK;
++		freq = BAMBOO_TMRCLK;
 +	else
-+		freq =3D clocks.cpu;
++		freq = clocks.cpu;
 +
 +	ibm44x_calibrate_decr(freq);
-+=09
++	
 +}
 +
 +static int
@@ -119,7 +117,7 @@ new file mode 100644
 +static inline int
 +bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 +{
-+	static char pci_irq_table[][4] =3D
++	static char pci_irq_table[][4] =
 +	/*
 +	 *	PCI IDSEL/INTPIN->INTLINE
 +	 * 	   A   B   C   D
@@ -131,7 +129,7 @@ new file mode 100644
 +		{ 25, 25, 25, 25 },	/* IDSEL 4 - PCI Slot 3 */
 +	};
 +
-+	const long min_idsel =3D 1, max_idsel =3D 4, irqs_per_slot =3D 4;
++	const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
 +	return PCI_IRQ_TABLE_LOOKUP;
 +}
 +
@@ -142,34 +140,34 @@ new file mode 100644
 +	struct ocp_func_emac_data *emacdata;
 +	u8 selection1_val;
 +	int mode;
-+=09
-+	selection1_base =3D ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
-+	selection1_val =3D readb(selection1_base);
++	
++	selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
++	selection1_val = readb(selection1_base);
 +	iounmap((void *) selection1_base);
 +	if (BAMBOO_SEL_MII(selection1_val))
-+		mode =3D PHY_MODE_MII;
++		mode = PHY_MODE_MII;
 +	else if (BAMBOO_SEL_RMII(selection1_val))
-+		mode =3D PHY_MODE_RMII;
-+	else=20
-+		mode =3D PHY_MODE_SMII;
-+=09
++		mode = PHY_MODE_RMII;
++	else 
++		mode = PHY_MODE_SMII;
++	
 +	/* Set mac_addr and phy mode for each EMAC */
 +
-+	def =3D ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
-+	emacdata =3D def->additions;
++	def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
++	emacdata = def->additions;
 +	memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
-+	emacdata->phy_mode =3D mode;
++	emacdata->phy_mode = mode;
 +
-+	def =3D ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
-+	emacdata =3D def->additions;
++	def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
++	emacdata = def->additions;
 +	memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
-+	emacdata->phy_mode =3D mode;
++	emacdata->phy_mode = mode;
 +}
 +
 +static int
 +bamboo_exclude_device(unsigned char bus, unsigned char devfn)
 +{
-+	return (bus =3D=3D 0 && devfn =3D=3D 0);
++	return (bus == 0 && devfn == 0);
 +}
 +
 +#define PCI_READW(offset) \
@@ -177,7 +175,7 @@ new file mode 100644
 +
 +#define PCI_WRITEW(value, offset) \
 +	(writew(value, (void *)((u32)pci_reg_base+offset)))
-+=09
++	
 +#define PCI_WRITEL(value, offset) \
 +	(writel(value, (void *)((u32)pci_reg_base+offset)))
 +
@@ -186,13 +184,13 @@ new file mode 100644
 +{
 +	void *pci_reg_base;
 +	unsigned long memory_size;
-+	memory_size =3D ppc_md.find_end_of_memory();
++	memory_size = ppc_md.find_end_of_memory();
 +
-+	pci_reg_base =3D ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);
++	pci_reg_base = ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);
 +
 +	/* Enable PCI I/O, Mem, and Busmaster cycles */
-+	PCI_WRITEW(PCI_READW(PCI_COMMAND) |=20
-+		   PCI_COMMAND_MEMORY |=20
++	PCI_WRITEW(PCI_READW(PCI_COMMAND) | 
++		   PCI_COMMAND_MEMORY | 
 +		   PCI_COMMAND_MASTER, PCI_COMMAND);
 +
 +	/* Disable region first */
@@ -206,24 +204,24 @@ new file mode 100644
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM0PCIHA);
 +
 +	/* Enable no pre-fetch, enable region */
-+	PCI_WRITEL(((0xffffffff -=20
-+		     (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01),=20
++	PCI_WRITEL(((0xffffffff - 
++		     (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01), 
 +		      BAMBOO_PCIL0_PMM0MA);
-+=09
++	
 +	/* Disable region one */
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM1LA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCILA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCIHA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
-+=09
++	
 +	/* Disable region two */
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM2LA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCILA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCIHA);
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
-+=09
++	
 +	/* Now configure the PCI->PLB windows, we only use PTM1
 +	 *
 +	 * For Inbound flow, set the window size to all available memory
@@ -231,15 +229,15 @@ new file mode 100644
 +	 * then Eth/PCI DD would fail as PCI card not able to access
 +	 * the memory allocated by DD.
 +	 */
-+=09
++	
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PTM1MS);	/* disabled region 1 */
 +	PCI_WRITEL(0, BAMBOO_PCIL0_PTM1LA);	/* begin of address map */
 +
-+	memory_size =3D 1 << fls(memory_size - 1);
++	memory_size = 1 << fls(memory_size - 1);
 +
 +	/* Size low + Enabled */
 +	PCI_WRITEL((0xffffffff - (memory_size - 1)) | 0x1, BAMBOO_PCIL0_PTM1MS);
-+=09
++	
 +	eieio();
 +	iounmap(pci_reg_base);
 +}
@@ -252,15 +250,15 @@ new file mode 100644
 +
 +	bamboo_setup_pci();
 +
-+	hose =3D pcibios_alloc_controller();
++	hose = pcibios_alloc_controller();
 +
 +	if (!hose)
 +		return;
 +
-+	hose->first_busno =3D 0;
-+	hose->last_busno =3D 0xff;
++	hose->first_busno = 0;
++	hose->last_busno = 0xff;
 +
-+	hose->pci_mem_offset =3D BAMBOO_PCI_MEM_OFFSET;
++	hose->pci_mem_offset = BAMBOO_PCI_MEM_OFFSET;
 +
 +	pci_init_resource(&hose->io_resource,
 +			BAMBOO_PCI_LOWER_IO,
@@ -274,24 +272,23 @@ new file mode 100644
 +			IORESOURCE_MEM,
 +			"PCI host bridge");
 +
-+	ppc_md.pci_exclude_device =3D bamboo_exclude_device;
++	ppc_md.pci_exclude_device = bamboo_exclude_device;
 +
-+	hose->io_space.start =3D BAMBOO_PCI_LOWER_IO;
-+	hose->io_space.end =3D BAMBOO_PCI_UPPER_IO;
-+	hose->mem_space.start =3D BAMBOO_PCI_LOWER_MEM;
-+	hose->mem_space.end =3D BAMBOO_PCI_UPPER_MEM;
-+	isa_io_base =3D
++	hose->io_space.start = BAMBOO_PCI_LOWER_IO;
++	hose->io_space.end = BAMBOO_PCI_UPPER_IO;
++	hose->mem_space.start = BAMBOO_PCI_LOWER_MEM;
++	hose->mem_space.end = BAMBOO_PCI_UPPER_MEM;
++	isa_io_base =
 +		(unsigned long)ioremap64(BAMBOO_PCI_IO_BASE, BAMBOO_PCI_IO_SIZE);
-+	hose->io_base_virt =3D (void *)isa_io_base;
++	hose->io_base_virt = (void *)isa_io_base;
 +
 +	setup_indirect_pci(hose,
 +			BAMBOO_PCI_CFGA_PLB32,
 +			BAMBOO_PCI_CFGD_PLB32);
-+	hose->set_cfg_type =3D 1;
++	hose->set_cfg_type = 1;
 +
 +	/* Zero config bars */
-+	for (bar =3D PCI_BASE_ADDRESS_1; bar <=3D PCI_BASE_ADDRESS_2; bar +=3D 4)=
- {
++	for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
 +		early_write_config_dword(hose, hose->first_busno,
 +					 PCI_FUNC(hose->first_busno), bar,
 +					 0x00000000);
@@ -300,10 +297,10 @@ new file mode 100644
 +					&bar_response);
 +	}
 +
-+	hose->last_busno =3D pciauto_bus_scan(hose, hose->first_busno);
++	hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 +
-+	ppc_md.pci_swizzle =3D common_swizzle;
-+	ppc_md.pci_map_irq =3D bamboo_map_irq;
++	ppc_md.pci_swizzle = common_swizzle;
++	ppc_md.pci_map_irq = bamboo_map_irq;
 +}
 +
 +TODC_ALLOC();
@@ -315,15 +312,15 @@ new file mode 100644
 +
 +	/* Setup ioremapped serial port access */
 +	memset(&port, 0, sizeof(port));
-+	port.membase =3D ioremap64(PPC440EP_UART0_ADDR, 8);
-+	port.irq =3D 0;
-+	port.uartclk =3D clocks.uart0;
-+	port.regshift =3D 0;
-+	port.iotype =3D SERIAL_IO_MEM;
-+	port.flags =3D ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
-+	port.line =3D 0;
-+
-+	if (early_serial_setup(&port) !=3D 0) {
++	port.membase = ioremap64(PPC440EP_UART0_ADDR, 8);
++	port.irq = 0;
++	port.uartclk = clocks.uart0;
++	port.regshift = 0;
++	port.iotype = SERIAL_IO_MEM;
++	port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
++	port.line = 0;
++
++	if (early_serial_setup(&port) != 0) {
 +		printk("Early serial init of port 0 failed\n");
 +	}
 +
@@ -332,12 +329,12 @@ new file mode 100644
 +	gen550_init(0, &port);
 +#endif
 +
-+	port.membase =3D ioremap64(PPC440EP_UART1_ADDR, 8);
-+	port.irq =3D 1;
-+	port.uartclk =3D clocks.uart1;
-+	port.line =3D 1;
++	port.membase = ioremap64(PPC440EP_UART1_ADDR, 8);
++	port.irq = 1;
++	port.uartclk = clocks.uart1;
++	port.line = 1;
 +
-+	if (early_serial_setup(&port) !=3D 0) {
++	if (early_serial_setup(&port) != 0) {
 +		printk("Early serial init of port 1 failed\n");
 +	}
 +
@@ -346,12 +343,12 @@ new file mode 100644
 +	gen550_init(1, &port);
 +#endif
 +
-+	port.membase =3D ioremap64(PPC440EP_UART2_ADDR, 8);
-+	port.irq =3D 3;
-+	port.uartclk =3D clocks.uart2;
-+	port.line =3D 2;
++	port.membase = ioremap64(PPC440EP_UART2_ADDR, 8);
++	port.irq = 3;
++	port.uartclk = clocks.uart2;
++	port.line = 2;
 +
-+	if (early_serial_setup(&port) !=3D 0) {
++	if (early_serial_setup(&port) != 0) {
 +		printk("Early serial init of port 2 failed\n");
 +	}
 +
@@ -360,12 +357,12 @@ new file mode 100644
 +	gen550_init(2, &port);
 +#endif
 +
-+	port.membase =3D ioremap64(PPC440EP_UART3_ADDR, 8);
-+	port.irq =3D 4;
-+	port.uartclk =3D clocks.uart3;
-+	port.line =3D 3;
++	port.membase = ioremap64(PPC440EP_UART3_ADDR, 8);
++	port.irq = 4;
++	port.uartclk = clocks.uart3;
++	port.line = 3;
 +
-+	if (early_serial_setup(&port) !=3D 0) {
++	if (early_serial_setup(&port) != 0) {
 +		printk("Early serial init of port 3 failed\n");
 +	}
 +}
@@ -377,7 +374,7 @@ new file mode 100644
 +	bamboo_set_emacdata();
 +
 +	ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
-+	ocp_sys_info.opb_bus_freq =3D clocks.opb;
++	ocp_sys_info.opb_bus_freq = clocks.opb;
 +
 +	/* Setup TODC access */
 +	TODC_INIT(TODC_TYPE_DS1743,
@@ -387,27 +384,26 @@ new file mode 100644
 +			8);
 +
 +	/* init to some ~sane value until calibrate_delay() runs */
-+        loops_per_jiffy =3D 50000000/HZ;
++        loops_per_jiffy = 50000000/HZ;
 +
 +	/* Setup PCI host bridge */
 +	bamboo_setup_hose();
 +
 +#ifdef CONFIG_BLK_DEV_INITRD
 +	if (initrd_start)
-+		ROOT_DEV =3D Root_RAM0;
++		ROOT_DEV = Root_RAM0;
 +	else
 +#endif
 +#ifdef CONFIG_ROOT_NFS
-+		ROOT_DEV =3D Root_NFS;
++		ROOT_DEV = Root_NFS;
 +#else
-+		ROOT_DEV =3D Root_HDA1;
++		ROOT_DEV = Root_HDA1;
 +#endif
 +
 +	bamboo_early_serial_map();
 +
 +	/* Identify the system */
-+	printk("IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\n=
-");
++	printk("IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\n");
 +}
 +
 +void __init platform_init(unsigned long r3, unsigned long r4,
@@ -420,29 +416,28 @@ new file mode 100644
 +	 * residual data area.
 +	 */
 +	if (r3)
-+		__res =3D *(bd_t *)(r3 + KERNELBASE);
++		__res = *(bd_t *)(r3 + KERNELBASE);
 +
 +
 +	ibm44x_platform_init();
 +
-+	ppc_md.setup_arch =3D bamboo_setup_arch;
-+	ppc_md.show_cpuinfo =3D bamboo_show_cpuinfo;
-+	ppc_md.get_irq =3D NULL;		/* Set in ppc4xx_pic_init() */
++	ppc_md.setup_arch = bamboo_setup_arch;
++	ppc_md.show_cpuinfo = bamboo_show_cpuinfo;
++	ppc_md.get_irq = NULL;		/* Set in ppc4xx_pic_init() */
 +
-+	ppc_md.calibrate_decr =3D bamboo_calibrate_decr;
-+	ppc_md.time_init =3D todc_time_init;
-+	ppc_md.set_rtc_time =3D todc_set_rtc_time;
-+	ppc_md.get_rtc_time =3D todc_get_rtc_time;
++	ppc_md.calibrate_decr = bamboo_calibrate_decr;
++	ppc_md.time_init = todc_time_init;
++	ppc_md.set_rtc_time = todc_set_rtc_time;
++	ppc_md.get_rtc_time = todc_get_rtc_time;
 +
-+	ppc_md.nvram_read_val =3D todc_direct_read_val;
-+	ppc_md.nvram_write_val =3D todc_direct_write_val;
++	ppc_md.nvram_read_val = todc_direct_read_val;
++	ppc_md.nvram_write_val = todc_direct_write_val;
 +#ifdef CONFIG_KGDB
-+	ppc_md.early_serial_map =3D bamboo_early_serial_map;
++	ppc_md.early_serial_map = bamboo_early_serial_map;
 +#endif
 +}
 +
-diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bambo=
-o.h
+diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h
 new file mode 100644
 --- /dev/null
 +++ b/arch/ppc/platforms/4xx/bamboo.h
@@ -580,6 +575,6 @@ new file mode 100644
 +#define BAMBOO_PCIL0_PTM1LA		0x034
 +#define BAMBOO_PCIL0_PTM2MS		0x038
 +#define BAMBOO_PCIL0_PTM2LA		0x03C
-+=09
++	
 +#endif                          /* __ASM_BAMBOO_H__ */
 +#endif                          /* __KERNEL__ */
diff --git a/a/content_digest b/N1/content_digest
index 1092ea4..a2e05e3 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,8 +3,9 @@
  "Subject\0[PATCH][2/3] ppc32: add bamboo platform\0"
  "Date\0Wed, 27 Jul 2005 10:34:23 -0700\0"
  "To\0akpm@osdl.org\0"
- "Cc\0linux-kernel@vger.kernel.org"
- " linuxppc-embedded@ozlabs.org\0"
+ "Cc\0wfarnsworth@mvista.com"
+  linuxppc-embedded@ozlabs.org
+ " linux-kernel@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -14,8 +15,7 @@
  "Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>\n"
  "Signed-off-by: Matt Porter <mporter@kernel.crashing.org>\n"
  "\n"
- "diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bambo=\n"
- "o.c\n"
+ "diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c\n"
  "new file mode 100644\n"
  "--- /dev/null\n"
  "+++ b/arch/ppc/platforms/4xx/bamboo.c\n"
@@ -88,9 +88,8 @@
  "+/*\n"
  "+ * Bamboo external IRQ triggering/polarity settings\n"
  "+ */\n"
- "+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata =3D {\n"
- "+\t(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver =\n"
- "*/\n"
+ "+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {\n"
+ "+\t(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver */\n"
  "+\t(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ1: Expansion connector */\n"
  "+\t(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 0 */\n"
  "+\t(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 1 */\n"
@@ -108,12 +107,12 @@
  "+\tunsigned int freq;\n"
  "+\n"
  "+\tif (mfspr(SPRN_CCR1) & CCR1_TCS)\n"
- "+\t\tfreq =3D BAMBOO_TMRCLK;\n"
+ "+\t\tfreq = BAMBOO_TMRCLK;\n"
  "+\telse\n"
- "+\t\tfreq =3D clocks.cpu;\n"
+ "+\t\tfreq = clocks.cpu;\n"
  "+\n"
  "+\tibm44x_calibrate_decr(freq);\n"
- "+=09\n"
+ "+\t\n"
  "+}\n"
  "+\n"
  "+static int\n"
@@ -128,7 +127,7 @@
  "+static inline int\n"
  "+bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)\n"
  "+{\n"
- "+\tstatic char pci_irq_table[][4] =3D\n"
+ "+\tstatic char pci_irq_table[][4] =\n"
  "+\t/*\n"
  "+\t *\tPCI IDSEL/INTPIN->INTLINE\n"
  "+\t * \t   A   B   C   D\n"
@@ -140,7 +139,7 @@
  "+\t\t{ 25, 25, 25, 25 },\t/* IDSEL 4 - PCI Slot 3 */\n"
  "+\t};\n"
  "+\n"
- "+\tconst long min_idsel =3D 1, max_idsel =3D 4, irqs_per_slot =3D 4;\n"
+ "+\tconst long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;\n"
  "+\treturn PCI_IRQ_TABLE_LOOKUP;\n"
  "+}\n"
  "+\n"
@@ -151,34 +150,34 @@
  "+\tstruct ocp_func_emac_data *emacdata;\n"
  "+\tu8 selection1_val;\n"
  "+\tint mode;\n"
- "+=09\n"
- "+\tselection1_base =3D ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);\n"
- "+\tselection1_val =3D readb(selection1_base);\n"
+ "+\t\n"
+ "+\tselection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);\n"
+ "+\tselection1_val = readb(selection1_base);\n"
  "+\tiounmap((void *) selection1_base);\n"
  "+\tif (BAMBOO_SEL_MII(selection1_val))\n"
- "+\t\tmode =3D PHY_MODE_MII;\n"
+ "+\t\tmode = PHY_MODE_MII;\n"
  "+\telse if (BAMBOO_SEL_RMII(selection1_val))\n"
- "+\t\tmode =3D PHY_MODE_RMII;\n"
- "+\telse=20\n"
- "+\t\tmode =3D PHY_MODE_SMII;\n"
- "+=09\n"
+ "+\t\tmode = PHY_MODE_RMII;\n"
+ "+\telse \n"
+ "+\t\tmode = PHY_MODE_SMII;\n"
+ "+\t\n"
  "+\t/* Set mac_addr and phy mode for each EMAC */\n"
  "+\n"
- "+\tdef =3D ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);\n"
- "+\temacdata =3D def->additions;\n"
+ "+\tdef = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);\n"
+ "+\temacdata = def->additions;\n"
  "+\tmemcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);\n"
- "+\temacdata->phy_mode =3D mode;\n"
+ "+\temacdata->phy_mode = mode;\n"
  "+\n"
- "+\tdef =3D ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);\n"
- "+\temacdata =3D def->additions;\n"
+ "+\tdef = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);\n"
+ "+\temacdata = def->additions;\n"
  "+\tmemcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);\n"
- "+\temacdata->phy_mode =3D mode;\n"
+ "+\temacdata->phy_mode = mode;\n"
  "+}\n"
  "+\n"
  "+static int\n"
  "+bamboo_exclude_device(unsigned char bus, unsigned char devfn)\n"
  "+{\n"
- "+\treturn (bus =3D=3D 0 && devfn =3D=3D 0);\n"
+ "+\treturn (bus == 0 && devfn == 0);\n"
  "+}\n"
  "+\n"
  "+#define PCI_READW(offset) \\\n"
@@ -186,7 +185,7 @@
  "+\n"
  "+#define PCI_WRITEW(value, offset) \\\n"
  "+\t(writew(value, (void *)((u32)pci_reg_base+offset)))\n"
- "+=09\n"
+ "+\t\n"
  "+#define PCI_WRITEL(value, offset) \\\n"
  "+\t(writel(value, (void *)((u32)pci_reg_base+offset)))\n"
  "+\n"
@@ -195,13 +194,13 @@
  "+{\n"
  "+\tvoid *pci_reg_base;\n"
  "+\tunsigned long memory_size;\n"
- "+\tmemory_size =3D ppc_md.find_end_of_memory();\n"
+ "+\tmemory_size = ppc_md.find_end_of_memory();\n"
  "+\n"
- "+\tpci_reg_base =3D ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);\n"
+ "+\tpci_reg_base = ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);\n"
  "+\n"
  "+\t/* Enable PCI I/O, Mem, and Busmaster cycles */\n"
- "+\tPCI_WRITEW(PCI_READW(PCI_COMMAND) |=20\n"
- "+\t\t   PCI_COMMAND_MEMORY |=20\n"
+ "+\tPCI_WRITEW(PCI_READW(PCI_COMMAND) | \n"
+ "+\t\t   PCI_COMMAND_MEMORY | \n"
  "+\t\t   PCI_COMMAND_MASTER, PCI_COMMAND);\n"
  "+\n"
  "+\t/* Disable region first */\n"
@@ -215,24 +214,24 @@
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM0PCIHA);\n"
  "+\n"
  "+\t/* Enable no pre-fetch, enable region */\n"
- "+\tPCI_WRITEL(((0xffffffff -=20\n"
- "+\t\t     (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01),=20\n"
+ "+\tPCI_WRITEL(((0xffffffff - \n"
+ "+\t\t     (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01), \n"
  "+\t\t      BAMBOO_PCIL0_PMM0MA);\n"
- "+=09\n"
+ "+\t\n"
  "+\t/* Disable region one */\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM1LA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCILA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCIHA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);\n"
- "+=09\n"
+ "+\t\n"
  "+\t/* Disable region two */\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM2LA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCILA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCIHA);\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);\n"
- "+=09\n"
+ "+\t\n"
  "+\t/* Now configure the PCI->PLB windows, we only use PTM1\n"
  "+\t *\n"
  "+\t * For Inbound flow, set the window size to all available memory\n"
@@ -240,15 +239,15 @@
  "+\t * then Eth/PCI DD would fail as PCI card not able to access\n"
  "+\t * the memory allocated by DD.\n"
  "+\t */\n"
- "+=09\n"
+ "+\t\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PTM1MS);\t/* disabled region 1 */\n"
  "+\tPCI_WRITEL(0, BAMBOO_PCIL0_PTM1LA);\t/* begin of address map */\n"
  "+\n"
- "+\tmemory_size =3D 1 << fls(memory_size - 1);\n"
+ "+\tmemory_size = 1 << fls(memory_size - 1);\n"
  "+\n"
  "+\t/* Size low + Enabled */\n"
  "+\tPCI_WRITEL((0xffffffff - (memory_size - 1)) | 0x1, BAMBOO_PCIL0_PTM1MS);\n"
- "+=09\n"
+ "+\t\n"
  "+\teieio();\n"
  "+\tiounmap(pci_reg_base);\n"
  "+}\n"
@@ -261,15 +260,15 @@
  "+\n"
  "+\tbamboo_setup_pci();\n"
  "+\n"
- "+\those =3D pcibios_alloc_controller();\n"
+ "+\those = pcibios_alloc_controller();\n"
  "+\n"
  "+\tif (!hose)\n"
  "+\t\treturn;\n"
  "+\n"
- "+\those->first_busno =3D 0;\n"
- "+\those->last_busno =3D 0xff;\n"
+ "+\those->first_busno = 0;\n"
+ "+\those->last_busno = 0xff;\n"
  "+\n"
- "+\those->pci_mem_offset =3D BAMBOO_PCI_MEM_OFFSET;\n"
+ "+\those->pci_mem_offset = BAMBOO_PCI_MEM_OFFSET;\n"
  "+\n"
  "+\tpci_init_resource(&hose->io_resource,\n"
  "+\t\t\tBAMBOO_PCI_LOWER_IO,\n"
@@ -283,24 +282,23 @@
  "+\t\t\tIORESOURCE_MEM,\n"
  "+\t\t\t\"PCI host bridge\");\n"
  "+\n"
- "+\tppc_md.pci_exclude_device =3D bamboo_exclude_device;\n"
+ "+\tppc_md.pci_exclude_device = bamboo_exclude_device;\n"
  "+\n"
- "+\those->io_space.start =3D BAMBOO_PCI_LOWER_IO;\n"
- "+\those->io_space.end =3D BAMBOO_PCI_UPPER_IO;\n"
- "+\those->mem_space.start =3D BAMBOO_PCI_LOWER_MEM;\n"
- "+\those->mem_space.end =3D BAMBOO_PCI_UPPER_MEM;\n"
- "+\tisa_io_base =3D\n"
+ "+\those->io_space.start = BAMBOO_PCI_LOWER_IO;\n"
+ "+\those->io_space.end = BAMBOO_PCI_UPPER_IO;\n"
+ "+\those->mem_space.start = BAMBOO_PCI_LOWER_MEM;\n"
+ "+\those->mem_space.end = BAMBOO_PCI_UPPER_MEM;\n"
+ "+\tisa_io_base =\n"
  "+\t\t(unsigned long)ioremap64(BAMBOO_PCI_IO_BASE, BAMBOO_PCI_IO_SIZE);\n"
- "+\those->io_base_virt =3D (void *)isa_io_base;\n"
+ "+\those->io_base_virt = (void *)isa_io_base;\n"
  "+\n"
  "+\tsetup_indirect_pci(hose,\n"
  "+\t\t\tBAMBOO_PCI_CFGA_PLB32,\n"
  "+\t\t\tBAMBOO_PCI_CFGD_PLB32);\n"
- "+\those->set_cfg_type =3D 1;\n"
+ "+\those->set_cfg_type = 1;\n"
  "+\n"
  "+\t/* Zero config bars */\n"
- "+\tfor (bar =3D PCI_BASE_ADDRESS_1; bar <=3D PCI_BASE_ADDRESS_2; bar +=3D 4)=\n"
- " {\n"
+ "+\tfor (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {\n"
  "+\t\tearly_write_config_dword(hose, hose->first_busno,\n"
  "+\t\t\t\t\t PCI_FUNC(hose->first_busno), bar,\n"
  "+\t\t\t\t\t 0x00000000);\n"
@@ -309,10 +307,10 @@
  "+\t\t\t\t\t&bar_response);\n"
  "+\t}\n"
  "+\n"
- "+\those->last_busno =3D pciauto_bus_scan(hose, hose->first_busno);\n"
+ "+\those->last_busno = pciauto_bus_scan(hose, hose->first_busno);\n"
  "+\n"
- "+\tppc_md.pci_swizzle =3D common_swizzle;\n"
- "+\tppc_md.pci_map_irq =3D bamboo_map_irq;\n"
+ "+\tppc_md.pci_swizzle = common_swizzle;\n"
+ "+\tppc_md.pci_map_irq = bamboo_map_irq;\n"
  "+}\n"
  "+\n"
  "+TODC_ALLOC();\n"
@@ -324,15 +322,15 @@
  "+\n"
  "+\t/* Setup ioremapped serial port access */\n"
  "+\tmemset(&port, 0, sizeof(port));\n"
- "+\tport.membase =3D ioremap64(PPC440EP_UART0_ADDR, 8);\n"
- "+\tport.irq =3D 0;\n"
- "+\tport.uartclk =3D clocks.uart0;\n"
- "+\tport.regshift =3D 0;\n"
- "+\tport.iotype =3D SERIAL_IO_MEM;\n"
- "+\tport.flags =3D ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;\n"
- "+\tport.line =3D 0;\n"
- "+\n"
- "+\tif (early_serial_setup(&port) !=3D 0) {\n"
+ "+\tport.membase = ioremap64(PPC440EP_UART0_ADDR, 8);\n"
+ "+\tport.irq = 0;\n"
+ "+\tport.uartclk = clocks.uart0;\n"
+ "+\tport.regshift = 0;\n"
+ "+\tport.iotype = SERIAL_IO_MEM;\n"
+ "+\tport.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;\n"
+ "+\tport.line = 0;\n"
+ "+\n"
+ "+\tif (early_serial_setup(&port) != 0) {\n"
  "+\t\tprintk(\"Early serial init of port 0 failed\\n\");\n"
  "+\t}\n"
  "+\n"
@@ -341,12 +339,12 @@
  "+\tgen550_init(0, &port);\n"
  "+#endif\n"
  "+\n"
- "+\tport.membase =3D ioremap64(PPC440EP_UART1_ADDR, 8);\n"
- "+\tport.irq =3D 1;\n"
- "+\tport.uartclk =3D clocks.uart1;\n"
- "+\tport.line =3D 1;\n"
+ "+\tport.membase = ioremap64(PPC440EP_UART1_ADDR, 8);\n"
+ "+\tport.irq = 1;\n"
+ "+\tport.uartclk = clocks.uart1;\n"
+ "+\tport.line = 1;\n"
  "+\n"
- "+\tif (early_serial_setup(&port) !=3D 0) {\n"
+ "+\tif (early_serial_setup(&port) != 0) {\n"
  "+\t\tprintk(\"Early serial init of port 1 failed\\n\");\n"
  "+\t}\n"
  "+\n"
@@ -355,12 +353,12 @@
  "+\tgen550_init(1, &port);\n"
  "+#endif\n"
  "+\n"
- "+\tport.membase =3D ioremap64(PPC440EP_UART2_ADDR, 8);\n"
- "+\tport.irq =3D 3;\n"
- "+\tport.uartclk =3D clocks.uart2;\n"
- "+\tport.line =3D 2;\n"
+ "+\tport.membase = ioremap64(PPC440EP_UART2_ADDR, 8);\n"
+ "+\tport.irq = 3;\n"
+ "+\tport.uartclk = clocks.uart2;\n"
+ "+\tport.line = 2;\n"
  "+\n"
- "+\tif (early_serial_setup(&port) !=3D 0) {\n"
+ "+\tif (early_serial_setup(&port) != 0) {\n"
  "+\t\tprintk(\"Early serial init of port 2 failed\\n\");\n"
  "+\t}\n"
  "+\n"
@@ -369,12 +367,12 @@
  "+\tgen550_init(2, &port);\n"
  "+#endif\n"
  "+\n"
- "+\tport.membase =3D ioremap64(PPC440EP_UART3_ADDR, 8);\n"
- "+\tport.irq =3D 4;\n"
- "+\tport.uartclk =3D clocks.uart3;\n"
- "+\tport.line =3D 3;\n"
+ "+\tport.membase = ioremap64(PPC440EP_UART3_ADDR, 8);\n"
+ "+\tport.irq = 4;\n"
+ "+\tport.uartclk = clocks.uart3;\n"
+ "+\tport.line = 3;\n"
  "+\n"
- "+\tif (early_serial_setup(&port) !=3D 0) {\n"
+ "+\tif (early_serial_setup(&port) != 0) {\n"
  "+\t\tprintk(\"Early serial init of port 3 failed\\n\");\n"
  "+\t}\n"
  "+}\n"
@@ -386,7 +384,7 @@
  "+\tbamboo_set_emacdata();\n"
  "+\n"
  "+\tibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);\n"
- "+\tocp_sys_info.opb_bus_freq =3D clocks.opb;\n"
+ "+\tocp_sys_info.opb_bus_freq = clocks.opb;\n"
  "+\n"
  "+\t/* Setup TODC access */\n"
  "+\tTODC_INIT(TODC_TYPE_DS1743,\n"
@@ -396,27 +394,26 @@
  "+\t\t\t8);\n"
  "+\n"
  "+\t/* init to some ~sane value until calibrate_delay() runs */\n"
- "+        loops_per_jiffy =3D 50000000/HZ;\n"
+ "+        loops_per_jiffy = 50000000/HZ;\n"
  "+\n"
  "+\t/* Setup PCI host bridge */\n"
  "+\tbamboo_setup_hose();\n"
  "+\n"
  "+#ifdef CONFIG_BLK_DEV_INITRD\n"
  "+\tif (initrd_start)\n"
- "+\t\tROOT_DEV =3D Root_RAM0;\n"
+ "+\t\tROOT_DEV = Root_RAM0;\n"
  "+\telse\n"
  "+#endif\n"
  "+#ifdef CONFIG_ROOT_NFS\n"
- "+\t\tROOT_DEV =3D Root_NFS;\n"
+ "+\t\tROOT_DEV = Root_NFS;\n"
  "+#else\n"
- "+\t\tROOT_DEV =3D Root_HDA1;\n"
+ "+\t\tROOT_DEV = Root_HDA1;\n"
  "+#endif\n"
  "+\n"
  "+\tbamboo_early_serial_map();\n"
  "+\n"
  "+\t/* Identify the system */\n"
- "+\tprintk(\"IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\\n=\n"
- "\");\n"
+ "+\tprintk(\"IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\\n\");\n"
  "+}\n"
  "+\n"
  "+void __init platform_init(unsigned long r3, unsigned long r4,\n"
@@ -429,29 +426,28 @@
  "+\t * residual data area.\n"
  "+\t */\n"
  "+\tif (r3)\n"
- "+\t\t__res =3D *(bd_t *)(r3 + KERNELBASE);\n"
+ "+\t\t__res = *(bd_t *)(r3 + KERNELBASE);\n"
  "+\n"
  "+\n"
  "+\tibm44x_platform_init();\n"
  "+\n"
- "+\tppc_md.setup_arch =3D bamboo_setup_arch;\n"
- "+\tppc_md.show_cpuinfo =3D bamboo_show_cpuinfo;\n"
- "+\tppc_md.get_irq =3D NULL;\t\t/* Set in ppc4xx_pic_init() */\n"
+ "+\tppc_md.setup_arch = bamboo_setup_arch;\n"
+ "+\tppc_md.show_cpuinfo = bamboo_show_cpuinfo;\n"
+ "+\tppc_md.get_irq = NULL;\t\t/* Set in ppc4xx_pic_init() */\n"
  "+\n"
- "+\tppc_md.calibrate_decr =3D bamboo_calibrate_decr;\n"
- "+\tppc_md.time_init =3D todc_time_init;\n"
- "+\tppc_md.set_rtc_time =3D todc_set_rtc_time;\n"
- "+\tppc_md.get_rtc_time =3D todc_get_rtc_time;\n"
+ "+\tppc_md.calibrate_decr = bamboo_calibrate_decr;\n"
+ "+\tppc_md.time_init = todc_time_init;\n"
+ "+\tppc_md.set_rtc_time = todc_set_rtc_time;\n"
+ "+\tppc_md.get_rtc_time = todc_get_rtc_time;\n"
  "+\n"
- "+\tppc_md.nvram_read_val =3D todc_direct_read_val;\n"
- "+\tppc_md.nvram_write_val =3D todc_direct_write_val;\n"
+ "+\tppc_md.nvram_read_val = todc_direct_read_val;\n"
+ "+\tppc_md.nvram_write_val = todc_direct_write_val;\n"
  "+#ifdef CONFIG_KGDB\n"
- "+\tppc_md.early_serial_map =3D bamboo_early_serial_map;\n"
+ "+\tppc_md.early_serial_map = bamboo_early_serial_map;\n"
  "+#endif\n"
  "+}\n"
  "+\n"
- "diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bambo=\n"
- "o.h\n"
+ "diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h\n"
  "new file mode 100644\n"
  "--- /dev/null\n"
  "+++ b/arch/ppc/platforms/4xx/bamboo.h\n"
@@ -589,8 +585,8 @@
  "+#define BAMBOO_PCIL0_PTM1LA\t\t0x034\n"
  "+#define BAMBOO_PCIL0_PTM2MS\t\t0x038\n"
  "+#define BAMBOO_PCIL0_PTM2LA\t\t0x03C\n"
- "+=09\n"
+ "+\t\n"
  "+#endif                          /* __ASM_BAMBOO_H__ */\n"
  +#endif                          /* __KERNEL__ */
 
-dee106c3977eb3c73a2fce4a67c4614f2115bfee577ea6d0b3368a9879f4a70f
+33ff01df315687697dc37acdc50c946e7d4518f22a9e369c1043ad2a39c9cf31

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