From: Tejun Heo <htejun@gmail.com>
To: jgarzik@pobox.com, alan@lxorguk.ukuu.org.uk, axboe@suse.de,
albertcc@tw.ibm.com, forrest.zhao@intel.com, efalk@google.com,
linux-ide@vger.kernel.org
Cc: Tejun Heo <htejun@gmail.com>
Subject: [PATCH 08/12] ahci: clean up AHCI constants in preparation for NCQ
Date: Thu, 11 May 2006 23:44:43 +0900 [thread overview]
Message-ID: <11473586834196-git-send-email-htejun@gmail.com> (raw)
In-Reply-To: <1147358682210-git-send-email-htejun@gmail.com>
* Rename CMD_TBL_HDR to CMD_TBL_HDR_SZ as it's size not offset.
* Define MAX_CMDS and CMD_SZ and use them in calculation of other
constants.
* Define CMD_TBL_AR_SZ as product of CMD_TBL_SZ and MAX_CMDS, and use
it when calculating PRIV_DMA_SZ.
* CMD_SLOT_SZ is also dependent on MAX_CMDS but hasn't been changed
because I didn't want to change the value used by the original code
(32 commands). Later NCQ change will bump MAX_CMDS to 32 anyway and
the hard coded 32 can be changed to MAX_CMDS then.
* Reorder HOST_CAP_* flags.
---
drivers/scsi/ahci.c | 15 +++++++++------
1 files changed, 9 insertions(+), 6 deletions(-)
e24ebe47347cf08d2c2b57923b3948732e94b7f3
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 680dd5b..1177ae5 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -56,12 +56,15 @@ enum {
AHCI_MAX_SG = 168, /* hardware max is 64K */
AHCI_DMA_BOUNDARY = 0xffffffff,
AHCI_USE_CLUSTERING = 0,
- AHCI_CMD_SLOT_SZ = 32 * 32,
+ AHCI_MAX_CMDS = 1,
+ AHCI_CMD_SZ = 32,
+ AHCI_CMD_SLOT_SZ = 32 * AHCI_CMD_SZ,
AHCI_RX_FIS_SZ = 256,
- AHCI_CMD_TBL_HDR = 0x80,
AHCI_CMD_TBL_CDB = 0x40,
- AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16),
- AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ +
+ AHCI_CMD_TBL_HDR_SZ = 0x80,
+ AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * 16),
+ AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS,
+ AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ +
AHCI_RX_FIS_SZ,
AHCI_IRQ_ON_SG = (1 << 31),
AHCI_CMD_ATAPI = (1 << 5),
@@ -89,8 +92,8 @@ enum {
HOST_AHCI_EN = (1 << 31), /* AHCI enabled */
/* HOST_CAP bits */
- HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
HOST_CAP_CLO = (1 << 24), /* Command List Override support */
+ HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
/* registers for each SATA port */
PORT_LST_ADDR = 0x00, /* command list DMA addr */
@@ -393,7 +396,7 @@ static int ahci_port_start(struct ata_po
pp->cmd_tbl = mem;
pp->cmd_tbl_dma = mem_dma;
- pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR;
+ pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR_SZ;
ap->private_data = pp;
--
1.2.4
next prev parent reply other threads:[~2006-05-11 14:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-11 14:44 [PATCHSET 05/11] add NCQ support, take 3 Tejun Heo
2006-05-11 14:44 ` [PATCH 01/12] libata-ncq: add NCQ related ATA/libata constants and macros Tejun Heo
2006-05-11 14:44 ` [PATCH 02/12] libata-ncq: pass ata_scsi_translate() return value to SCSI midlayer Tejun Heo
2006-05-11 14:44 ` [PATCH 06/12] libata-ncq: update EH to handle NCQ Tejun Heo
2006-05-11 14:44 ` [PATCH 07/12] libata-ncq: implement NCQ device configuration Tejun Heo
2006-05-11 14:44 ` [PATCH 09/12] ahci: add HOST_CAP_NCQ constant Tejun Heo
2006-05-11 14:44 ` Tejun Heo [this message]
2006-05-11 14:44 ` [PATCH 03/12] libata-ncq: rename ap->qactive to ap->qc_allocated Tejun Heo
2006-05-11 14:44 ` [PATCH 12/12] sata_sil24: implement NCQ support Tejun Heo
2006-05-11 14:44 ` [PATCH 04/12] libata-ncq: implement ap->qc_active, ap->sactive and complete helper Tejun Heo
2006-05-11 14:44 ` [PATCH 05/12] libata-ncq: implement NCQ command translation and exclusion Tejun Heo
2006-05-11 14:44 ` [PATCH 11/12] ahci: implement NCQ suppport Tejun Heo
2006-05-11 14:44 ` [PATCH 10/12] ahci: kill pp->cmd_tbl_sg Tejun Heo
2006-05-13 22:39 ` [PATCHSET 05/11] add NCQ support, take 3 Jeff Garzik
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