From: Matthew Percival <matthew@capgo.com>
To: Linux OMAP Open Source <linux-omap-open-source@linux.omap.com>
Subject: RE: Using McBSP in kernel...
Date: Thu, 20 Jul 2006 16:53:34 +1000 [thread overview]
Message-ID: <1153378414.5157.7.camel@localhost.localdomain> (raw)
In-Reply-To: <77C7F7CB1230A74A9D19C0C111E6EDBEAD159C@DLEE09.ent.ti.com>
G'Day,
Thanks for the reply.
> Configuration seems to fine, did you check pin muxing?
Aye, MUX settings are correct according to the manual. The clock
(ARM_PER, according to the manual) is also on (I checked
both /proc/omap_clocks and the ARM_IDLCT2 register). I have also
observed that, for whatever reason, I can read/write the registers
perfectly fine in kernel, but they always seem to return 0x0 when I try
to read from user space (using devmem2). I am not sure if that is
relevant or not, but it seemed odd.
> Also, note that clock will be generated only when there is data on the
> bus. Otherwise the line will be simply high. If CS line is configured as
> active low, then you might not even see the CS line changing its
> transition. Try to put CS line as high during initialization and then do
> a write, it should drop to low.
I am not sure what you mean by configuring the CS line. Could you give
a reference for this? If you are referring to the Frame Sync./Slave
Enable, that is configured to active low, but I am not sure how to
configure it to be high during initialisation.
-- Matthew
next prev parent reply other threads:[~2006-07-20 6:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-19 15:17 Using McBSP in kernel Khasim, Syed
2006-07-20 6:53 ` Matthew Percival [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-07-20 12:16 Khasim, Syed
2006-07-24 6:47 ` Matthew Percival
2006-07-26 21:16 ` Mark Howell
2006-07-19 6:56 Matthew Percival
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