From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9C8AC433E0 for ; Mon, 15 Mar 2021 18:39:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 736A364F26 for ; Mon, 15 Mar 2021 18:39:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229708AbhCOSjV (ORCPT ); Mon, 15 Mar 2021 14:39:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231665AbhCOSjJ (ORCPT ); Mon, 15 Mar 2021 14:39:09 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 291E9C06174A; Mon, 15 Mar 2021 11:39:09 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id 16so17483223ljc.11; Mon, 15 Mar 2021 11:39:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=KO44h0uObgEN+CbJaeye5M8R+QLroU33+3EnpKPK0Zc=; b=Wcct+L78J7FhiuyEOC0azdpN42lEyaWldO9VbNqOm6WnWb2ACnpK2tS8sddTATuz8Z qEyiWx7qk5RhASZPKdfFqglj1M06gkN52WRdYYGMHRgT6y12FTWCz50SvFw+nKqudF0M E5SUe0QU+l2YnbixCqcUtkS0hfakWfgU/LwHOOG8bVt09Qi7RgjO2sdOAvxcAxjKvgRc 3R25ze+FNE1lO/NygEp5Lo2zyPnwrTlkbCSGrn3mbckT8/0XcMcz3LsUX7n+aoeUVYD1 geg3sanpe64KhyGqF5tofjAaBhLPVGyFyG3Meryb+bjmnOGUbzHRgJ3aDpzjy7kcAEln hmGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=KO44h0uObgEN+CbJaeye5M8R+QLroU33+3EnpKPK0Zc=; b=mMrEKBHW1ATQgjsWQkMzyuFxVlf7GF/8VetRaNKLPsIa9K3V2nI0pcELic0hgjXW0t aEA6BKINJt6WX3r9/48STxCGtQdDLctlS/1YJRkXWx6M6E2yNoY3esggqcxpvj8nR64f 6iwwuENAsrEW5KrB5l+MD5neIBKKaPKGG9vCdd09P/gnw8ZBzPDwnLFAqM1vF2bK1AD/ Nz9m96BWbise1WxDSXJ6MKNnvAWoevjyDF3Kf/uLTQS/FED1jutFtr6DgwSkFD2l6lrC SRosw2IoYRSVKwkeSOs6EPsUXRoaXeJY64WBRoiJZ3+z/hgfyf74pqcqzAK3M2JxRo8q PHtw== X-Gm-Message-State: AOAM5312B4OrwdIm6j9zEnsA+kAUB9yTCWyAzNhT/j6WvnlLqmph2slZ uSe8VV1w4FoHKd+Kym3nDY2KLx3FVJo= X-Google-Smtp-Source: ABdhPJzAzvUfdIh5PrIN5KmKthL6Ugz5Zq8SwLs888Jv/nqvzEK2iGbdWqRlP0OG/eAQSjvojwJRtw== X-Received: by 2002:a2e:94c8:: with SMTP id r8mr235866ljh.332.1615833547675; Mon, 15 Mar 2021 11:39:07 -0700 (PDT) Received: from [192.168.2.145] (109-252-193-52.dynamic.spd-mgts.ru. [109.252.193.52]) by smtp.googlemail.com with ESMTPSA id z28sm2992541ljn.117.2021.03.15.11.39.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 15 Mar 2021 11:39:07 -0700 (PDT) Subject: Re: [PATCH v15 1/2] drm/tegra: dc: Support memory bandwidth management To: =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= Cc: Thierry Reding , Jonathan Hunter , Matt Merhar , Peter Geis , Nicolas Chauvet , linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20210311172255.25213-1-digetx@gmail.com> <20210311172255.25213-2-digetx@gmail.com> <20210314223119.GC2733@qmqm.qmqm.pl> From: Dmitry Osipenko Message-ID: <1158bbca-8880-918d-7564-e2e30552e6b3@gmail.com> Date: Mon, 15 Mar 2021 21:39:06 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210314223119.GC2733@qmqm.qmqm.pl> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org 15.03.2021 01:31, Michał Mirosław пишет: > On Thu, Mar 11, 2021 at 08:22:54PM +0300, Dmitry Osipenko wrote: >> Display controller (DC) performs isochronous memory transfers, and thus, >> has a requirement for a minimum memory bandwidth that shall be fulfilled, >> otherwise framebuffer data can't be fetched fast enough and this results >> in a DC's data-FIFO underflow that follows by a visual corruption. > [...] >> +static unsigned long >> +tegra_plane_overlap_mask(struct drm_crtc_state *state, >> + const struct drm_plane_state *plane_state) >> +{ >> + const struct drm_plane_state *other_state; >> + const struct tegra_plane *tegra; >> + unsigned long overlap_mask = 0; >> + struct drm_plane *plane; >> + struct drm_rect rect; >> + >> + if (!plane_state->visible || !plane_state->fb) >> + return 0; >> + >> + drm_atomic_crtc_state_for_each_plane_state(plane, other_state, state) { > [...] >> + /* >> + * Data-prefetch FIFO will easily help to overcome temporal memory >> + * pressure if other plane overlaps with the cursor plane. >> + */ >> + if (tegra_plane_is_cursor(plane_state) && overlap_mask) >> + return 0; >> + >> + return overlap_mask; >> +} > > Since for cursor plane this always returns 0, you could test > tegra_plane_is_cursor() at the start of the function. Yes, thanks. >> +static int tegra_crtc_calculate_memory_bandwidth(struct drm_crtc *crtc, >> + struct drm_atomic_state *state) > [...] >> + /* >> + * For overlapping planes pixel's data is fetched for each plane at >> + * the same time, hence bandwidths are accumulated in this case. >> + * This needs to be taken into account for calculating total bandwidth >> + * consumed by all planes. >> + * >> + * Here we get the overlapping state of each plane, which is a >> + * bitmask of plane indices telling with what planes there is an >> + * overlap. Note that bitmask[plane] includes BIT(plane) in order >> + * to make further code nicer and simpler. >> + */ >> + drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, new_state) { >> + tegra_state = to_const_tegra_plane_state(plane_state); >> + tegra = to_tegra_plane(plane); >> + >> + if (WARN_ON_ONCE(tegra->index >= TEGRA_DC_LEGACY_PLANES_NUM)) >> + return -EINVAL; >> + >> + plane_peak_bw[tegra->index] = tegra_state->peak_memory_bandwidth; >> + mask = tegra_plane_overlap_mask(new_state, plane_state); >> + overlap_mask[tegra->index] = mask; >> + >> + if (hweight_long(mask) != 3) >> + all_planes_overlap_simultaneously = false; >> + } >> + >> + old_state = drm_atomic_get_old_crtc_state(state, crtc); >> + old_dc_state = to_const_dc_state(old_state); >> + >> + /* >> + * Then we calculate maximum bandwidth of each plane state. >> + * The bandwidth includes the plane BW + BW of the "simultaneously" >> + * overlapping planes, where "simultaneously" means areas where DC >> + * fetches from the planes simultaneously during of scan-out process. >> + * >> + * For example, if plane A overlaps with planes B and C, but B and C >> + * don't overlap, then the peak bandwidth will be either in area where >> + * A-and-B or A-and-C planes overlap. >> + * >> + * The plane_peak_bw[] contains peak memory bandwidth values of >> + * each plane, this information is needed by interconnect provider >> + * in order to set up latency allowness based on the peak BW, see >> + * tegra_crtc_update_memory_bandwidth(). >> + */ >> + for (i = 0; i < ARRAY_SIZE(plane_peak_bw); i++) { >> + overlap_bw = 0; >> + >> + for_each_set_bit(k, &overlap_mask[i], 3) { >> + if (k == i) >> + continue; >> + >> + if (all_planes_overlap_simultaneously) >> + overlap_bw += plane_peak_bw[k]; >> + else >> + overlap_bw = max(overlap_bw, plane_peak_bw[k]); >> + } >> + >> + new_dc_state->plane_peak_bw[i] = plane_peak_bw[i] + overlap_bw; >> + >> + /* >> + * If plane's peak bandwidth changed (for example plane isn't >> + * overlapped anymore) and plane isn't in the atomic state, >> + * then add plane to the state in order to have the bandwidth >> + * updated. >> + */ >> + if (old_dc_state->plane_peak_bw[i] != >> + new_dc_state->plane_peak_bw[i]) { >> + plane = tegra_crtc_get_plane_by_index(crtc, i); >> + if (!plane) >> + continue; >> + >> + plane_state = drm_atomic_get_plane_state(state, plane); >> + if (IS_ERR(plane_state)) >> + return PTR_ERR(plane_state); >> + } >> + } > [...] > > Does it matter to which channel (plane) the peak bw is attached? Would > it still work if the first channel specified max(peak_bw of overlaps) > and others only zeroes? The latency allowance will be configured incorrectly for the case of zeroes by the memory driver, hence it does matter. >> + /* >> + * Horizontal downscale needs a lower memory latency, which roughly >> + * depends on the scaled width. Trying to tune latency of a memory >> + * client alone will likely result in a strong negative impact on >> + * other memory clients, hence we will request a higher bandwidth >> + * since latency depends on bandwidth. This allows to prevent memory >> + * FIFO underflows for a large plane downscales, meanwhile allowing >> + * display to share bandwidth fairly with other memory clients. >> + */ >> + if (src_w > dst_w) >> + mul = (src_w - dst_w) * bpp / 2048 + 1; >> + else >> + mul = 1; > [...] > > One point is unexplained yet: why is the multiplier proportional to a > *difference* between src and dst widths? Also, I would expect max (worst > case) is pixclock * read_size when src_w/dst_w >= read_size. IIRC, the difference gives a more adequate/practical result than the proportion. Although, downstream driver uses proportion. I'll try to revisit this for the next version of the patch. > BTW, you could move this below and : if (src > dst_w) peak_bandwidth *= ... Indeed, and should be a bit nicer to use 'mul' in both cases. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.0 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEA8EC433DB for ; Mon, 15 Mar 2021 18:39:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 811DF64F26 for ; Mon, 15 Mar 2021 18:39:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 811DF64F26 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5DE16E105; Mon, 15 Mar 2021 18:39:09 +0000 (UTC) Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5DD776E105 for ; Mon, 15 Mar 2021 18:39:09 +0000 (UTC) Received: by mail-lj1-x230.google.com with SMTP id z25so17478809lja.3 for ; Mon, 15 Mar 2021 11:39:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=KO44h0uObgEN+CbJaeye5M8R+QLroU33+3EnpKPK0Zc=; b=Wcct+L78J7FhiuyEOC0azdpN42lEyaWldO9VbNqOm6WnWb2ACnpK2tS8sddTATuz8Z qEyiWx7qk5RhASZPKdfFqglj1M06gkN52WRdYYGMHRgT6y12FTWCz50SvFw+nKqudF0M E5SUe0QU+l2YnbixCqcUtkS0hfakWfgU/LwHOOG8bVt09Qi7RgjO2sdOAvxcAxjKvgRc 3R25ze+FNE1lO/NygEp5Lo2zyPnwrTlkbCSGrn3mbckT8/0XcMcz3LsUX7n+aoeUVYD1 geg3sanpe64KhyGqF5tofjAaBhLPVGyFyG3Meryb+bjmnOGUbzHRgJ3aDpzjy7kcAEln hmGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=KO44h0uObgEN+CbJaeye5M8R+QLroU33+3EnpKPK0Zc=; b=gjEtX0dgiCrmbk8I3zIW9smLlTtnVGf/58JcapMWe0IURMq35tlIvXHNhJmdW5m119 NtlR0+7sjWmMVqrwFi9G0mKIwPQ9d7fxACSM4h9gD5RC8n+C5BelNtTeOKUhQ1mepHFT TT4d2nBN1tEIjCbhU3sOZrRpboRimXoHK56I16AOuQk5ei/GqXKST49HClpmVXpKD1LM pPKVo5/eL8QdhOd/rRjchFKQu8skc3yL3E5GtYHfxDeP0OBV9efUVDhzBHJKV0fnly8I QfWsKhnC4K1yo+EVpztjowrgyjY+2tEC7DvoBN/ySYs+R7ptFriUSrl3zBjaZyn/NDdx ymfA== X-Gm-Message-State: AOAM532ncG2vE+bWha6yJDurOwWA87w90/NwspX8DCxc+RW8z1A2fjRT rjhyXpC0AeiYSobJuag6gktAicWlKzE= X-Google-Smtp-Source: ABdhPJzAzvUfdIh5PrIN5KmKthL6Ugz5Zq8SwLs888Jv/nqvzEK2iGbdWqRlP0OG/eAQSjvojwJRtw== X-Received: by 2002:a2e:94c8:: with SMTP id r8mr235866ljh.332.1615833547675; Mon, 15 Mar 2021 11:39:07 -0700 (PDT) Received: from [192.168.2.145] (109-252-193-52.dynamic.spd-mgts.ru. [109.252.193.52]) by smtp.googlemail.com with ESMTPSA id z28sm2992541ljn.117.2021.03.15.11.39.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 15 Mar 2021 11:39:07 -0700 (PDT) Subject: Re: [PATCH v15 1/2] drm/tegra: dc: Support memory bandwidth management To: =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= References: <20210311172255.25213-1-digetx@gmail.com> <20210311172255.25213-2-digetx@gmail.com> <20210314223119.GC2733@qmqm.qmqm.pl> From: Dmitry Osipenko Message-ID: <1158bbca-8880-918d-7564-e2e30552e6b3@gmail.com> Date: Mon, 15 Mar 2021 21:39:06 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210314223119.GC2733@qmqm.qmqm.pl> Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, Nicolas Chauvet , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Jonathan Hunter , Thierry Reding , Matt Merhar , Peter Geis , linux-tegra@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" MTUuMDMuMjAyMSAwMTozMSwgTWljaGHFgiBNaXJvc8WCYXcg0L/QuNGI0LXRgjoKPiBPbiBUaHUs IE1hciAxMSwgMjAyMSBhdCAwODoyMjo1NFBNICswMzAwLCBEbWl0cnkgT3NpcGVua28gd3JvdGU6 Cj4+IERpc3BsYXkgY29udHJvbGxlciAoREMpIHBlcmZvcm1zIGlzb2Nocm9ub3VzIG1lbW9yeSB0 cmFuc2ZlcnMsIGFuZCB0aHVzLAo+PiBoYXMgYSByZXF1aXJlbWVudCBmb3IgYSBtaW5pbXVtIG1l bW9yeSBiYW5kd2lkdGggdGhhdCBzaGFsbCBiZSBmdWxmaWxsZWQsCj4+IG90aGVyd2lzZSBmcmFt ZWJ1ZmZlciBkYXRhIGNhbid0IGJlIGZldGNoZWQgZmFzdCBlbm91Z2ggYW5kIHRoaXMgcmVzdWx0 cwo+PiBpbiBhIERDJ3MgZGF0YS1GSUZPIHVuZGVyZmxvdyB0aGF0IGZvbGxvd3MgYnkgYSB2aXN1 YWwgY29ycnVwdGlvbi4KPiBbLi4uXQo+PiArc3RhdGljIHVuc2lnbmVkIGxvbmcKPj4gK3RlZ3Jh X3BsYW5lX292ZXJsYXBfbWFzayhzdHJ1Y3QgZHJtX2NydGNfc3RhdGUgKnN0YXRlLAo+PiArCQkJ IGNvbnN0IHN0cnVjdCBkcm1fcGxhbmVfc3RhdGUgKnBsYW5lX3N0YXRlKQo+PiArewo+PiArCWNv bnN0IHN0cnVjdCBkcm1fcGxhbmVfc3RhdGUgKm90aGVyX3N0YXRlOwo+PiArCWNvbnN0IHN0cnVj dCB0ZWdyYV9wbGFuZSAqdGVncmE7Cj4+ICsJdW5zaWduZWQgbG9uZyBvdmVybGFwX21hc2sgPSAw Owo+PiArCXN0cnVjdCBkcm1fcGxhbmUgKnBsYW5lOwo+PiArCXN0cnVjdCBkcm1fcmVjdCByZWN0 Owo+PiArCj4+ICsJaWYgKCFwbGFuZV9zdGF0ZS0+dmlzaWJsZSB8fCAhcGxhbmVfc3RhdGUtPmZi KQo+PiArCQlyZXR1cm4gMDsKPj4gKwo+PiArCWRybV9hdG9taWNfY3J0Y19zdGF0ZV9mb3JfZWFj aF9wbGFuZV9zdGF0ZShwbGFuZSwgb3RoZXJfc3RhdGUsIHN0YXRlKSB7Cj4gWy4uLl0KPj4gKwkv Kgo+PiArCSAqIERhdGEtcHJlZmV0Y2ggRklGTyB3aWxsIGVhc2lseSBoZWxwIHRvIG92ZXJjb21l IHRlbXBvcmFsIG1lbW9yeQo+PiArCSAqIHByZXNzdXJlIGlmIG90aGVyIHBsYW5lIG92ZXJsYXBz IHdpdGggdGhlIGN1cnNvciBwbGFuZS4KPj4gKwkgKi8KPj4gKwlpZiAodGVncmFfcGxhbmVfaXNf Y3Vyc29yKHBsYW5lX3N0YXRlKSAmJiBvdmVybGFwX21hc2spCj4+ICsJCXJldHVybiAwOwo+PiAr Cj4+ICsJcmV0dXJuIG92ZXJsYXBfbWFzazsKPj4gK30KPiAKPiBTaW5jZSBmb3IgY3Vyc29yIHBs YW5lIHRoaXMgYWx3YXlzIHJldHVybnMgMCwgeW91IGNvdWxkIHRlc3QKPiB0ZWdyYV9wbGFuZV9p c19jdXJzb3IoKSBhdCB0aGUgc3RhcnQgb2YgdGhlIGZ1bmN0aW9uLgoKWWVzLCB0aGFua3MuCgo+ PiArc3RhdGljIGludCB0ZWdyYV9jcnRjX2NhbGN1bGF0ZV9tZW1vcnlfYmFuZHdpZHRoKHN0cnVj dCBkcm1fY3J0YyAqY3J0YywKPj4gKwkJCQkJCSBzdHJ1Y3QgZHJtX2F0b21pY19zdGF0ZSAqc3Rh dGUpCj4gWy4uLl0KPj4gKwkvKgo+PiArCSAqIEZvciBvdmVybGFwcGluZyBwbGFuZXMgcGl4ZWwn cyBkYXRhIGlzIGZldGNoZWQgZm9yIGVhY2ggcGxhbmUgYXQKPj4gKwkgKiB0aGUgc2FtZSB0aW1l LCBoZW5jZSBiYW5kd2lkdGhzIGFyZSBhY2N1bXVsYXRlZCBpbiB0aGlzIGNhc2UuCj4+ICsJICog VGhpcyBuZWVkcyB0byBiZSB0YWtlbiBpbnRvIGFjY291bnQgZm9yIGNhbGN1bGF0aW5nIHRvdGFs IGJhbmR3aWR0aAo+PiArCSAqIGNvbnN1bWVkIGJ5IGFsbCBwbGFuZXMuCj4+ICsJICoKPj4gKwkg KiBIZXJlIHdlIGdldCB0aGUgb3ZlcmxhcHBpbmcgc3RhdGUgb2YgZWFjaCBwbGFuZSwgd2hpY2gg aXMgYQo+PiArCSAqIGJpdG1hc2sgb2YgcGxhbmUgaW5kaWNlcyB0ZWxsaW5nIHdpdGggd2hhdCBw bGFuZXMgdGhlcmUgaXMgYW4KPj4gKwkgKiBvdmVybGFwLiBOb3RlIHRoYXQgYml0bWFza1twbGFu ZV0gaW5jbHVkZXMgQklUKHBsYW5lKSBpbiBvcmRlcgo+PiArCSAqIHRvIG1ha2UgZnVydGhlciBj b2RlIG5pY2VyIGFuZCBzaW1wbGVyLgo+PiArCSAqLwo+PiArCWRybV9hdG9taWNfY3J0Y19zdGF0 ZV9mb3JfZWFjaF9wbGFuZV9zdGF0ZShwbGFuZSwgcGxhbmVfc3RhdGUsIG5ld19zdGF0ZSkgewo+ PiArCQl0ZWdyYV9zdGF0ZSA9IHRvX2NvbnN0X3RlZ3JhX3BsYW5lX3N0YXRlKHBsYW5lX3N0YXRl KTsKPj4gKwkJdGVncmEgPSB0b190ZWdyYV9wbGFuZShwbGFuZSk7Cj4+ICsKPj4gKwkJaWYgKFdB Uk5fT05fT05DRSh0ZWdyYS0+aW5kZXggPj0gVEVHUkFfRENfTEVHQUNZX1BMQU5FU19OVU0pKQo+ PiArCQkJcmV0dXJuIC1FSU5WQUw7Cj4+ICsKPj4gKwkJcGxhbmVfcGVha19id1t0ZWdyYS0+aW5k ZXhdID0gdGVncmFfc3RhdGUtPnBlYWtfbWVtb3J5X2JhbmR3aWR0aDsKPj4gKwkJbWFzayA9IHRl Z3JhX3BsYW5lX292ZXJsYXBfbWFzayhuZXdfc3RhdGUsIHBsYW5lX3N0YXRlKTsKPj4gKwkJb3Zl cmxhcF9tYXNrW3RlZ3JhLT5pbmRleF0gPSBtYXNrOwo+PiArCj4+ICsJCWlmIChod2VpZ2h0X2xv bmcobWFzaykgIT0gMykKPj4gKwkJCWFsbF9wbGFuZXNfb3ZlcmxhcF9zaW11bHRhbmVvdXNseSA9 IGZhbHNlOwo+PiArCX0KPj4gKwo+PiArCW9sZF9zdGF0ZSA9IGRybV9hdG9taWNfZ2V0X29sZF9j cnRjX3N0YXRlKHN0YXRlLCBjcnRjKTsKPj4gKwlvbGRfZGNfc3RhdGUgPSB0b19jb25zdF9kY19z dGF0ZShvbGRfc3RhdGUpOwo+PiArCj4+ICsJLyoKPj4gKwkgKiBUaGVuIHdlIGNhbGN1bGF0ZSBt YXhpbXVtIGJhbmR3aWR0aCBvZiBlYWNoIHBsYW5lIHN0YXRlLgo+PiArCSAqIFRoZSBiYW5kd2lk dGggaW5jbHVkZXMgdGhlIHBsYW5lIEJXICsgQlcgb2YgdGhlICJzaW11bHRhbmVvdXNseSIKPj4g KwkgKiBvdmVybGFwcGluZyBwbGFuZXMsIHdoZXJlICJzaW11bHRhbmVvdXNseSIgbWVhbnMgYXJl YXMgd2hlcmUgREMKPj4gKwkgKiBmZXRjaGVzIGZyb20gdGhlIHBsYW5lcyBzaW11bHRhbmVvdXNs eSBkdXJpbmcgb2Ygc2Nhbi1vdXQgcHJvY2Vzcy4KPj4gKwkgKgo+PiArCSAqIEZvciBleGFtcGxl LCBpZiBwbGFuZSBBIG92ZXJsYXBzIHdpdGggcGxhbmVzIEIgYW5kIEMsIGJ1dCBCIGFuZCBDCj4+ ICsJICogZG9uJ3Qgb3ZlcmxhcCwgdGhlbiB0aGUgcGVhayBiYW5kd2lkdGggd2lsbCBiZSBlaXRo ZXIgaW4gYXJlYSB3aGVyZQo+PiArCSAqIEEtYW5kLUIgb3IgQS1hbmQtQyBwbGFuZXMgb3Zlcmxh cC4KPj4gKwkgKgo+PiArCSAqIFRoZSBwbGFuZV9wZWFrX2J3W10gY29udGFpbnMgcGVhayBtZW1v cnkgYmFuZHdpZHRoIHZhbHVlcyBvZgo+PiArCSAqIGVhY2ggcGxhbmUsIHRoaXMgaW5mb3JtYXRp b24gaXMgbmVlZGVkIGJ5IGludGVyY29ubmVjdCBwcm92aWRlcgo+PiArCSAqIGluIG9yZGVyIHRv IHNldCB1cCBsYXRlbmN5IGFsbG93bmVzcyBiYXNlZCBvbiB0aGUgcGVhayBCVywgc2VlCj4+ICsJ ICogdGVncmFfY3J0Y191cGRhdGVfbWVtb3J5X2JhbmR3aWR0aCgpLgo+PiArCSAqLwo+PiArCWZv ciAoaSA9IDA7IGkgPCBBUlJBWV9TSVpFKHBsYW5lX3BlYWtfYncpOyBpKyspIHsKPj4gKwkJb3Zl cmxhcF9idyA9IDA7Cj4+ICsKPj4gKwkJZm9yX2VhY2hfc2V0X2JpdChrLCAmb3ZlcmxhcF9tYXNr W2ldLCAzKSB7Cj4+ICsJCQlpZiAoayA9PSBpKQo+PiArCQkJCWNvbnRpbnVlOwo+PiArCj4+ICsJ CQlpZiAoYWxsX3BsYW5lc19vdmVybGFwX3NpbXVsdGFuZW91c2x5KQo+PiArCQkJCW92ZXJsYXBf YncgKz0gcGxhbmVfcGVha19id1trXTsKPj4gKwkJCWVsc2UKPj4gKwkJCQlvdmVybGFwX2J3ID0g bWF4KG92ZXJsYXBfYncsIHBsYW5lX3BlYWtfYndba10pOwo+PiArCQl9Cj4+ICsKPj4gKwkJbmV3 X2RjX3N0YXRlLT5wbGFuZV9wZWFrX2J3W2ldID0gcGxhbmVfcGVha19id1tpXSArIG92ZXJsYXBf Ync7Cj4+ICsKPj4gKwkJLyoKPj4gKwkJICogSWYgcGxhbmUncyBwZWFrIGJhbmR3aWR0aCBjaGFu Z2VkIChmb3IgZXhhbXBsZSBwbGFuZSBpc24ndAo+PiArCQkgKiBvdmVybGFwcGVkIGFueW1vcmUp IGFuZCBwbGFuZSBpc24ndCBpbiB0aGUgYXRvbWljIHN0YXRlLAo+PiArCQkgKiB0aGVuIGFkZCBw bGFuZSB0byB0aGUgc3RhdGUgaW4gb3JkZXIgdG8gaGF2ZSB0aGUgYmFuZHdpZHRoCj4+ICsJCSAq IHVwZGF0ZWQuCj4+ICsJCSAqLwo+PiArCQlpZiAob2xkX2RjX3N0YXRlLT5wbGFuZV9wZWFrX2J3 W2ldICE9Cj4+ICsJCSAgICBuZXdfZGNfc3RhdGUtPnBsYW5lX3BlYWtfYndbaV0pIHsKPj4gKwkJ CXBsYW5lID0gdGVncmFfY3J0Y19nZXRfcGxhbmVfYnlfaW5kZXgoY3J0YywgaSk7Cj4+ICsJCQlp ZiAoIXBsYW5lKQo+PiArCQkJCWNvbnRpbnVlOwo+PiArCj4+ICsJCQlwbGFuZV9zdGF0ZSA9IGRy bV9hdG9taWNfZ2V0X3BsYW5lX3N0YXRlKHN0YXRlLCBwbGFuZSk7Cj4+ICsJCQlpZiAoSVNfRVJS KHBsYW5lX3N0YXRlKSkKPj4gKwkJCQlyZXR1cm4gUFRSX0VSUihwbGFuZV9zdGF0ZSk7Cj4+ICsJ CX0KPj4gKwl9Cj4gWy4uLl0KPiAKPiBEb2VzIGl0IG1hdHRlciB0byB3aGljaCBjaGFubmVsIChw bGFuZSkgdGhlIHBlYWsgYncgaXMgYXR0YWNoZWQ/IFdvdWxkCj4gaXQgc3RpbGwgd29yayBpZiB0 aGUgZmlyc3QgY2hhbm5lbCBzcGVjaWZpZWQgbWF4KHBlYWtfYncgb2Ygb3ZlcmxhcHMpCj4gYW5k IG90aGVycyBvbmx5IHplcm9lcz8KClRoZSBsYXRlbmN5IGFsbG93YW5jZSB3aWxsIGJlIGNvbmZp Z3VyZWQgaW5jb3JyZWN0bHkgZm9yIHRoZSBjYXNlIG9mCnplcm9lcyBieSB0aGUgbWVtb3J5IGRy aXZlciwgaGVuY2UgaXQgZG9lcyBtYXR0ZXIuCgo+PiArCS8qCj4+ICsJICogSG9yaXpvbnRhbCBk b3duc2NhbGUgbmVlZHMgYSBsb3dlciBtZW1vcnkgbGF0ZW5jeSwgd2hpY2ggcm91Z2hseQo+PiAr CSAqIGRlcGVuZHMgb24gdGhlIHNjYWxlZCB3aWR0aC4gIFRyeWluZyB0byB0dW5lIGxhdGVuY3kg b2YgYSBtZW1vcnkKPj4gKwkgKiBjbGllbnQgYWxvbmUgd2lsbCBsaWtlbHkgcmVzdWx0IGluIGEg c3Ryb25nIG5lZ2F0aXZlIGltcGFjdCBvbgo+PiArCSAqIG90aGVyIG1lbW9yeSBjbGllbnRzLCBo ZW5jZSB3ZSB3aWxsIHJlcXVlc3QgYSBoaWdoZXIgYmFuZHdpZHRoCj4+ICsJICogc2luY2UgbGF0 ZW5jeSBkZXBlbmRzIG9uIGJhbmR3aWR0aC4gIFRoaXMgYWxsb3dzIHRvIHByZXZlbnQgbWVtb3J5 Cj4+ICsJICogRklGTyB1bmRlcmZsb3dzIGZvciBhIGxhcmdlIHBsYW5lIGRvd25zY2FsZXMsIG1l YW53aGlsZSBhbGxvd2luZwo+PiArCSAqIGRpc3BsYXkgdG8gc2hhcmUgYmFuZHdpZHRoIGZhaXJs eSB3aXRoIG90aGVyIG1lbW9yeSBjbGllbnRzLgo+PiArCSAqLwo+PiArCWlmIChzcmNfdyA+IGRz dF93KQo+PiArCQltdWwgPSAoc3JjX3cgLSBkc3RfdykgKiBicHAgLyAyMDQ4ICsgMTsKPj4gKwll bHNlCj4+ICsJCW11bCA9IDE7Cj4gWy4uLl0KPiAKPiBPbmUgcG9pbnQgaXMgdW5leHBsYWluZWQg eWV0OiB3aHkgaXMgdGhlIG11bHRpcGxpZXIgcHJvcG9ydGlvbmFsIHRvIGEKPiAqZGlmZmVyZW5j ZSogYmV0d2VlbiBzcmMgYW5kIGRzdCB3aWR0aHM/IEFsc28sIEkgd291bGQgZXhwZWN0IG1heCAo d29yc3QKPiBjYXNlKSBpcyBwaXhjbG9jayAqIHJlYWRfc2l6ZSB3aGVuIHNyY193L2RzdF93ID49 IHJlYWRfc2l6ZS4KCklJUkMsIHRoZSBkaWZmZXJlbmNlIGdpdmVzIGEgbW9yZSBhZGVxdWF0ZS9w cmFjdGljYWwgcmVzdWx0IHRoYW4gdGhlCnByb3BvcnRpb24uIEFsdGhvdWdoLCBkb3duc3RyZWFt IGRyaXZlciB1c2VzIHByb3BvcnRpb24uIEknbGwgdHJ5IHRvCnJldmlzaXQgdGhpcyBmb3IgdGhl IG5leHQgdmVyc2lvbiBvZiB0aGUgcGF0Y2guCgo+IEJUVywgeW91IGNvdWxkIG1vdmUgdGhpcyBi ZWxvdyBhbmQgOiBpZiAoc3JjID4gZHN0X3cpIHBlYWtfYmFuZHdpZHRoICo9IC4uLgoKSW5kZWVk LCBhbmQgc2hvdWxkIGJlIGEgYml0IG5pY2VyIHRvIHVzZSAnbXVsJyBpbiBib3RoIGNhc2VzLgpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwg bWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK