From mboxrd@z Thu Jan  1 00:00:00 1970
From: Alex Williamson <alex.williamson@hp.com>
Subject: [PATCH] Re: [Xen-staging] [xen-unstable] [qemu] Remove
	atomic_set_bit, atomic_clear_bit and ia64_intrinsic.h and its
Date: Thu, 10 May 2007 10:35:17 -0600
Message-ID: <1178814917.27751.8.camel@bling>
References: <200705101500.l4AF0N4b027027@latara.uk.xensource.com>
Mime-Version: 1.0
Content-Type: text/plain
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xensource.com>
In-Reply-To: <200705101500.l4AF0N4b027027@latara.uk.xensource.com>
List-Unsubscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xensource.com>
List-Help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-Subscribe: <http://lists.xensource.com/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
Sender: xen-devel-bounces@lists.xensource.com
Errors-To: xen-devel-bounces@lists.xensource.com
To: xen-devel@lists.xensource.com
Cc: "Christian.Limpach" <Christian.Limpach@xensource.com>
List-Id: xen-devel@lists.xenproject.org

On Thu, 2007-05-10 at 16:00 +0100, Xen staging patchbot-unstable wrote:
> # HG changeset patch
> # User Christian Limpach <Christian.Limpach@xensource.com>
> # Date 1178809115 -3600
> # Node ID 8f510bf078c7745696547b5245ba95ac5a6192bc
> # Parent  a4467c0971ba0e876637478b7f5e37ce344768c0
> [qemu] Remove atomic_set_bit, atomic_clear_bit and ia64_intrinsic.h and its
> users.

   ia64intrin.h is all but empty in gcc 4.1.2, so there's no point in
including it.  dm-exec is still making use of a few of these too, but I
guess it's easy enough to inline them there.  Patch below.  Thanks,

	Alex

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
---

diff -r 07b1e917c9d8 tools/ioemu/exec-all.h
--- a/tools/ioemu/exec-all.h	Thu May 10 16:22:27 2007 +0100
+++ b/tools/ioemu/exec-all.h	Thu May 10 10:13:17 2007 -0600
@@ -474,8 +474,6 @@ static inline int testandset (int *p)
 #endif
 
 #ifdef __ia64
-#include <ia64intrin.h>
-
 static inline int testandset (int *p)
 {
     return __sync_lock_test_and_set (p, 1);
diff -r 07b1e917c9d8 tools/ioemu/target-i386-dm/exec-dm.c
--- a/tools/ioemu/target-i386-dm/exec-dm.c	Thu May 10 16:22:27 2007 +0100
+++ b/tools/ioemu/target-i386-dm/exec-dm.c	Thu May 10 10:11:38 2007 -0600
@@ -360,6 +360,11 @@ CPUReadMemoryFunc **cpu_get_io_memory_re
 }
 
 #ifdef __ia64__
+
+#define __ia64_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
+#define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
+#define ia64_srlz_i()	asm volatile (";; srlz.i ;;" ::: "memory")
+
 /* IA64 has seperate I/D cache, with coherence maintained by DMA controller.
  * So to emulate right behavior that guest OS is assumed, we need to flush
  * I/D cache here.