From: Bryan Wu <bryan.wu@analog.com>
To: torvalds@linux-foundation.org, akpm@linux-foundation.org,
linux-kernel@vger.kernel.org
Cc: Mike Frysinger <michael.frysinger@analog.com>,
Bryan Wu <bryan.wu@analog.com>
Subject: [PATCH 18/32] Blackfin arch: issue reset via SWRST so we dont clobber the watchdog state
Date: Mon, 21 May 2007 18:09:26 +0800 [thread overview]
Message-ID: <11797421862498-git-send-email-bryan.wu@analog.com> (raw)
In-Reply-To: <1179742180228-git-send-email-bryan.wu@analog.com>
From: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
---
arch/blackfin/mach-bf533/head.S | 68 +++++++++-----------------------------
arch/blackfin/mach-bf537/head.S | 70 +++++++++------------------------------
arch/blackfin/mach-bf561/head.S | 70 +++++++++------------------------------
3 files changed, 48 insertions(+), 160 deletions(-)
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 7cb8258..1a54ff5 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -481,66 +481,30 @@ ENTRY(_bfin_reset)
[p0] = r0;
SSYNC;
- /* Disable the WDOG TIMER */
- p0.h = hi(WDOG_CTL);
- p0.l = lo(WDOG_CTL);
- r0.l = 0xAD6;
- w[p0] = r0.l;
- SSYNC;
-
- /* Clear the sticky bit incase it is already set */
- p0.h = hi(WDOG_CTL);
- p0.l = lo(WDOG_CTL);
- r0.l = 0x8AD6;
- w[p0] = r0.l;
+ /* make sure SYSCR is set to use BMODE */
+ P0.h = hi(SYSCR);
+ P0.l = lo(SYSCR);
+ R0.l = 0x0;
+ W[P0] = R0.l;
SSYNC;
- /* Program the count value */
- R0.l = 0x100;
- R0.h = 0x0;
- P0.h = hi(WDOG_CNT);
- P0.l = lo(WDOG_CNT);
- [P0] = R0;
+ /* issue a system soft reset */
+ P1.h = hi(SWRST);
+ P1.l = lo(SWRST);
+ R1.l = 0x0007;
+ W[P1] = R1;
SSYNC;
- /* Program WDOG_STAT if necessary */
- P0.h = hi(WDOG_CTL);
- P0.l = lo(WDOG_CTL);
- R0 = W[P0](Z);
- CC = BITTST(R0,1);
- if !CC JUMP .LWRITESTAT;
- CC = BITTST(R0,2);
- if !CC JUMP .LWRITESTAT;
- JUMP .LSKIP_WRITE;
-
-.LWRITESTAT:
- /* When watch dog timer is enabled, a write to STAT will load the contents of CNT to STAT */
- R0 = 0x0000(z);
- P0.h = hi(WDOG_STAT);
- P0.l = lo(WDOG_STAT)
- [P0] = R0;
- SSYNC;
-
-.LSKIP_WRITE:
- /* Enable the reset event */
- P0.h = hi(WDOG_CTL);
- P0.l = lo(WDOG_CTL);
- R0 = W[P0](Z);
- BITCLR(R0,1);
- BITCLR(R0,2);
- W[P0] = R0.L;
- SSYNC;
- NOP;
-
- /* Enable the wdog counter */
- R0 = W[P0](Z);
- BITCLR(R0,4);
- W[P0] = R0.L;
+ /* clear system soft reset */
+ R0.l = 0x0000;
+ W[P0] = R0;
SSYNC;
- IDLE;
+ /* issue core reset */
+ raise 1;
RTS;
+ENDPROC(_bfin_reset)
#if CONFIG_DEBUG_KERNEL_START
debug_kernel_start_trap:
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index de78e42..aafc686 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -517,68 +517,30 @@ _delay_lab1_end:
[p0] = r0;
SSYNC;
- /* Disable the WDOG TIMER */
- p0.h = hi(WDOG_CTL);
- p0.l = lo(WDOG_CTL);
- r0.l = 0xAD6;
- w[p0] = r0.l;
+ /* make sure SYSCR is set to use BMODE */
+ P0.h = hi(SYSCR);
+ P0.l = lo(SYSCR);
+ R0.l = 0x0;
+ W[P0] = R0.l;
SSYNC;
- /* Clear the sticky bit incase it is already set */
- p0.h = hi(WDOG_CTL);
- p0.l = lo(WDOG_CTL);
- r0.l = 0x8AD6;
- w[p0] = r0.l;
+ /* issue a system soft reset */
+ P1.h = hi(SWRST);
+ P1.l = lo(SWRST);
+ R1.l = 0x0007;
+ W[P1] = R1;
SSYNC;
- /* Program the count value */
- R0.l = 0x100;
- R0.h = 0x0;
- P0.h = hi(WDOG_CNT);
- P0.l = lo(WDOG_CNT);
- [P0] = R0;
- SSYNC;
-
- /* Program WDOG_STAT if necessary */
- P0.h = hi(WDOG_CTL);
- P0.l = lo(WDOG_CTL);
- R0 = W[P0](Z);
- CC = BITTST(R0,1);
- if !CC JUMP .LWRITESTAT;
- CC = BITTST(R0,2);
- if !CC JUMP .LWRITESTAT;
- JUMP .LSKIP_WRITE;
-
-.LWRITESTAT:
- /* When watch dog timer is enabled,
- * a write to STAT will load the contents of CNT to STAT
- */
- R0 = 0x0000(z);
- P0.h = hi(WDOG_STAT);
- P0.l = lo(WDOG_STAT)
- [P0] = R0;
- SSYNC;
-
-.LSKIP_WRITE:
- /* Enable the reset event */
- P0.h = hi(WDOG_CTL);
- P0.l = lo(WDOG_CTL);
- R0 = W[P0](Z);
- BITCLR(R0,1);
- BITCLR(R0,2);
- W[P0] = R0.L;
- SSYNC;
- NOP;
-
- /* Enable the wdog counter */
- R0 = W[P0](Z);
- BITCLR(R0,4);
- W[P0] = R0.L;
+ /* clear system soft reset */
+ R0.l = 0x0000;
+ W[P0] = R0;
SSYNC;
- IDLE;
+ /* issue core reset */
+ raise 1;
RTS;
+ENDPROC(_bfin_reset)
.data
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 462c39e..04f3ac3 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -427,68 +427,30 @@ ENTRY(_bfin_reset)
[p0] = r0;
SSYNC;
- /* Disable the WDOG TIMER */
- p0.h = hi(WDOGA_CTL);
- p0.l = lo(WDOGA_CTL);
- r0.l = 0xAD6;
- w[p0] = r0.l;
+ /* make sure SYSCR is set to use BMODE */
+ P0.h = hi(SICA_SYSCR);
+ P0.l = lo(SICA_SYSCR);
+ R0.l = 0x0;
+ W[P0] = R0.l;
SSYNC;
- /* Clear the sticky bit incase it is already set */
- p0.h = hi(WDOGA_CTL);
- p0.l = lo(WDOGA_CTL);
- r0.l = 0x8AD6;
- w[p0] = r0.l;
- SSYNC;
-
- /* Program the count value */
- R0.l = 0x100;
- R0.h = 0x0;
- P0.h = hi(WDOGA_CNT);
- P0.l = lo(WDOGA_CNT);
- [P0] = R0;
+ /* issue a system soft reset */
+ P1.h = hi(SICA_SWRST);
+ P1.l = lo(SICA_SWRST);
+ R1.l = 0x0007;
+ W[P1] = R1;
SSYNC;
- /* Program WDOG_STAT if necessary */
- P0.h = hi(WDOGA_CTL);
- P0.l = lo(WDOGA_CTL);
- R0 = W[P0](Z);
- CC = BITTST(R0,1);
- if !CC JUMP .LWRITESTAT;
- CC = BITTST(R0,2);
- if !CC JUMP .LWRITESTAT;
- JUMP .LSKIP_WRITE;
-
-.LWRITESTAT:
- /* When watch dog timer is enabled,
- * a write to STAT will load the contents of CNT to STAT
- */
- R0 = 0x0000(z);
- P0.h = hi(WDOGA_STAT);
- P0.l = lo(WDOGA_STAT)
- [P0] = R0;
- SSYNC;
-
-.LSKIP_WRITE:
- /* Enable the reset event */
- P0.h = hi(WDOGA_CTL);
- P0.l = lo(WDOGA_CTL);
- R0 = W[P0](Z);
- BITCLR(R0,1);
- BITCLR(R0,2);
- W[P0] = R0.L;
- SSYNC;
- NOP;
-
- /* Enable the wdog counter */
- R0 = W[P0](Z);
- BITCLR(R0,4);
- W[P0] = R0.L;
+ /* clear system soft reset */
+ R0.l = 0x0000;
+ W[P0] = R0;
SSYNC;
- IDLE;
+ /* issue core reset */
+ raise 1;
RTS;
+ENDPROC(_bfin_reset)
.data
--
1.5.1.2
next prev parent reply other threads:[~2007-05-21 10:11 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-21 10:09 [PATCH 00/32] Blackfin update for 2.6.22-rc2 Bryan Wu
2007-05-21 10:09 ` [PATCH 01/32] Blackfin arch: Add Workaround for ANOMALY 05000257 Bryan Wu
2007-05-21 10:09 ` [PATCH 02/32] Blackfin arch: add SPI MMC driver support on bf533-stamp, tested on STAMP-BF533 Bryan Wu
2007-05-21 10:09 ` [PATCH 03/32] Blackfin arch: ISP1761 doesn't work for USB flash disk Bryan Wu
2007-05-21 10:09 ` [PATCH 04/32] Blackfin arch: fix a few random warnings Bryan Wu
2007-05-21 10:09 ` [PATCH 05/32] Blackfin arch: Add configuration data for ISP176x on BF561 Bryan Wu
2007-05-21 10:09 ` [PATCH 06/32] Blackfin arch: mark a bunch of local functions as static Bryan Wu
2007-05-21 10:09 ` [PATCH 07/32] Blackfin arch: Fix reserved map after we changed PORT_H definition Bryan Wu
2007-05-21 10:09 ` [PATCH 08/32] Blackfin arch: Move write to VR_CTL closer to IDLE Bryan Wu
2007-05-21 10:09 ` [PATCH 09/32] Blackfin arch: DMA operation cleanup Bryan Wu
2007-05-21 10:09 ` [PATCH 10/32] Blackfin arch: GPIO fix some defines Bryan Wu
2007-05-21 10:09 ` [PATCH 11/32] Blackfin arch: fix trace output for FLAT binaries Bryan Wu
2007-05-21 10:09 ` [PATCH 12/32] Blackfin arch: Fix bug using usb keyboard crashes kernel Bryan Wu
2007-05-21 11:39 ` Pekka Enberg
2007-05-21 10:09 ` [PATCH 13/32] Blackfin arch: initial tepla-bf561 board support Bryan Wu
2007-05-21 10:09 ` [PATCH 14/32] Blackfin arch: make sure we declare the revid functions as pure (since they are) Bryan Wu
2007-05-21 10:09 ` [PATCH 15/32] Blackfin arch: dont clear status register bits in SWRST so we can actually use it Bryan Wu
2007-05-21 10:09 ` [PATCH 16/32] Blackfin arch: finish removing p* volatile defines for MMRs Bryan Wu
2007-05-21 10:09 ` [PATCH 17/32] Blackfin arch: move board specific setup out of common init code and into the board specific init code Bryan Wu
2007-05-21 10:09 ` Bryan Wu [this message]
2007-05-21 10:09 ` [PATCH 19/32] Blackfin arch: document why we have to touch the UART peripheral in our boot up code Bryan Wu
2007-05-21 10:09 ` [PATCH 20/32] Blackfin arch: dma_memcpy borken for > 64K Bryan Wu
2007-05-21 11:26 ` Pekka Enberg
2007-05-21 17:49 ` Mike Frysinger
2007-05-21 10:09 ` [PATCH 21/32] Blackfin arch: dont clear the bit that tells coreb to start booting Bryan Wu
2007-05-21 10:09 ` [PATCH 22/32] Blackfin arch: make sure we use local labels Bryan Wu
2007-05-21 10:09 ` [PATCH 24/32] Blackfin arch: cache SWRST value at bootup so other things like watchdog can non-destructively query it Bryan Wu
2007-05-21 10:09 ` [PATCH 25/32] Blackfin arch: fix signal handling bug Bryan Wu
2007-05-21 10:09 ` [PATCH 26/32] Blackfin arch: Change NO_ACCESS_CHECK to ACCESS_CHECK Bryan Wu
2007-05-21 10:09 ` [PATCH 27/32] Blackfin arch: add board default configs to blackfin arch Bryan Wu
2007-05-21 10:09 ` [PATCH 28/32] Blackfin arch: update defconfig files Bryan Wu
2007-05-21 10:09 ` [PATCH 29/32] Blackfin arch: update pm.c according to power management API change Bryan Wu
2007-05-21 10:09 ` [PATCH 30/32] Blackfin serial driver: fix overhead issue Bryan Wu
2007-05-21 10:09 ` [PATCH 31/32] Blackfin serial driver: implement support for ignoring parity/break errors Bryan Wu
2007-05-21 10:09 ` Bryan Wu
2007-05-21 14:35 ` [PATCH 00/32] Blackfin update for 2.6.22-rc2 Robin Getz
2007-05-21 14:37 ` Paul Mundt
2007-05-23 0:28 ` Mike Frysinger
2007-05-23 1:06 ` Paul Mundt
2007-05-21 17:36 ` Mike Frysinger
2007-05-21 21:52 ` Robin Getz
2007-05-21 22:01 ` Mike Frysinger
2007-05-22 8:37 ` Bryan Wu
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