diff for duplicates of <1184679437.10380.31.camel@localhost.localdomain> diff --git a/a/1.txt b/N1/1.txt index 7084f5f..36341a7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ Intel manual (and KVM definition) say it's TPR is 4 bits wide. Also fix CR8_RESEVED_BITS typo. -Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> +Signed-off-by: Rusty Russell <rusty-8n+1lVoiYb80n/F98K4Iww@public.gmane.org> diff -r 6ef0b4c0d6f7 drivers/kvm/kvm_main.c --- a/drivers/kvm/kvm_main.c Tue Jul 17 18:07:48 2007 +1000 @@ -36,3 +36,11 @@ diff -r 6ef0b4c0d6f7 include/asm-i386/processor-flags.h /* * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h> + + + +------------------------------------------------------------------------- +This SF.net email is sponsored by DB2 Express +Download DB2 Express C - the FREE version of DB2 express and take +control of your XML. No limits. Just data. Click to get it now. +http://sourceforge.net/powerbar/db2/ diff --git a/a/content_digest b/N1/content_digest index 7f0c47a..5d64523 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -7,19 +7,20 @@ "ref\01184678348.10380.19.camel@localhost.localdomain\0" "ref\01184679175.10380.25.camel@localhost.localdomain\0" "ref\01184679256.10380.27.camel@localhost.localdomain\0" - "From\0Rusty Russell <rusty@rustcorp.com.au>\0" + "ref\01184679256.10380.27.camel-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org\0" + "From\0Rusty Russell <rusty-8n+1lVoiYb80n/F98K4Iww@public.gmane.org>\0" "Subject\0[PATCH 10/10] Use standard CR8 flags, and fix TPR definition\0" "Date\0Tue, 17 Jul 2007 23:37:17 +1000\0" - "To\0Avi Kivity <avi@qumranet.com>\0" - "Cc\0kvm-devel <kvm-devel@lists.sourceforge.net>" - lkml - Kernel Mailing List <linux-kernel@vger.kernel.org> - " H. Peter Anvin <hpa@zytor.com>\0" + "To\0Avi Kivity <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org>\0" + "Cc\0kvm-devel <kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>" + lkml - Kernel Mailing List <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + " H. Peter Anvin <hpa-YMNOUZJC4hwAvxtiuMwx3w@public.gmane.org>\0" "\00:1\0" "b\0" "Intel manual (and KVM definition) say it's TPR is 4 bits wide. Also fix\n" "CR8_RESEVED_BITS typo.\n" "\n" - "Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>\n" + "Signed-off-by: Rusty Russell <rusty-8n+1lVoiYb80n/F98K4Iww@public.gmane.org>\n" "\n" "diff -r 6ef0b4c0d6f7 drivers/kvm/kvm_main.c\n" "--- a/drivers/kvm/kvm_main.c\tTue Jul 17 18:07:48 2007 +1000\n" @@ -53,6 +54,14 @@ "+#define X86_CR8_TPR\t0x0000000F /* task priority register */\n" " \n" " /*\n" - * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h> + " * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>\n" + "\n" + "\n" + "\n" + "-------------------------------------------------------------------------\n" + "This SF.net email is sponsored by DB2 Express\n" + "Download DB2 Express C - the FREE version of DB2 express and take\n" + "control of your XML. No limits. Just data. Click to get it now.\n" + http://sourceforge.net/powerbar/db2/ -21dd3d9313f94e02e923b9ce68ff77c240fde47a4aa8c762b4a0ad63771b73c0 +15acf9b5501ba4b67c43e1d1f66b096cc4d7bfeda707f067345bc7dfa43f1c26
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