From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.intel.com (client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jae.hyun.yoo@linux.intel.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4392455WnMzDqsr for ; Thu, 6 Dec 2018 02:01:09 +1100 (AEDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Dec 2018 07:01:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,317,1539673200"; d="scan'208";a="125311302" Received: from yoojae-mobl1.amr.corp.intel.com (HELO [10.122.128.138]) ([10.122.128.138]) by fmsmga004.fm.intel.com with ESMTP; 05 Dec 2018 07:01:07 -0800 Subject: Re: [HELP] ipmi-kcs didn't work To: Samuel Jiang , Vijay Khemka , qianlihu , Gary Hsu , Ryan Chen Cc: "openbmc@lists.ozlabs.org" , Jenmin Yuan References: <3022407b-fa4e-9e80-2044-69dbf4f03586@linux.intel.com> <47558ef0-d8e9-de42-e1dd-be7293048a91@linux.intel.com> <4780f022-1c80-4b53-9eb1-0e3fe313c6a2@Spark> <87C3DCC8-F773-46A0-B8EC-5E3DC5E3983F@fb.com> <660c304f-60eb-f54a-f3b7-4d6d4481a96a@linux.intel.com> <253b7d32-1230-4111-a6dc-a84afddcc679@Spark> <25e866d4-749c-902b-86b2-3d38975dcc65@linux.intel.com> <033266A0-B6C1-4BE7-BA3B-A6E319BDD8D5@fb.com> <48f0e3b4-eca5-4ca6-a9ce-40b2a393ede9@Spark> From: Jae Hyun Yoo Message-ID: <11fda24c-a82d-2fb5-d0dd-e3f3001b4096@linux.intel.com> Date: Wed, 5 Dec 2018 09:01:06 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <48f0e3b4-eca5-4ca6-a9ce-40b2a393ede9@Spark> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Dec 2018 15:01:10 -0000 On 12/5/2018 12:45 AM, Samuel Jiang wrote: > Hi Ryan, > > I want to confirm the register default set of LCLK is running or stop > for Aspped SoC? > > Hi Jae, > I want to confirm that does the aspeed_gates is set for matching with > the SoC default clock setting? > Why should the aspeed_gates match with SoC default? All clocks will be set newly according to the dts setting at kernel booting time or at module probing time. Jae > I need to these things information for joining the discussion to assist > patch to send upstream. > > Thanks, > > Samuel Jiang > > On Dec 4, 2018, 2:17 PM +0800, Ryan Chen , wrote: >> Hello Jae, >> ASPEED LPC IP HW block have serval clk input. >> Most important is LCLK is come from LPC Host. >> The others is not controllable by register. >> Ryan >> >> -----Original Message----- >> From: Vijay Khemka [mailto:vijaykhemka@fb.com] >> Sent: Tuesday, December 4, 2018 3:38 AM >> To: Jae Hyun Yoo ; Samuel Jiang >> ; qianlihu ; >> Gary Hsu ; Ryan Chen >> Cc: openbmc@lists.ozlabs.org >> Subject: Re: [HELP] ipmi-kcs didn't work >> >> >> >> On 12/3/18, 7:54 AM, "Jae Hyun Yoo" wrote: >> >> On 12/1/2018 8:29 AM, Samuel Jiang wrote: >>> Apologize for sending out no content mail first. >>> >>> Jae, >>> The aspeed_gates in clk-aspeed.c perhaps as todo suggest asking Aspeed >>> the actual parent data for check initializing? >>> >> >> Yes, that makes sense. >> >> Hi Gary and Ryan, >> >> Can you please tell us what is the actual parent clock source of LPC IP? >> I mean the operational clock of LPC IP hardware block, not the interface >> clock. >> >> Thanks, >> Jae >> >>> Vijay, >>> I traced lpc-ctrl module, it seems direct update the same >>> ASPEED_CLK_GATE_LCLK register map bit to enable. If parent data is >>> disabled, it could enable in dts. >>> The device tree detail, I reference it from aspeed-g5.dtsi. Hope it >>> could help you for work. >>> >>> Thanks, >>> >>> Samuel Jiang >> >> Samual/Jay, >> In my case if I don't initialize LPC clock in driver, Bios on host >> side wait and doesn't boot. >> I don't understand here what is holding Bios here but by initializing >> this LPC clock let bios boot. >> >> Regards >> -Vijay >>