diff for duplicates of <1204852961.5541.34.camel@localhost> diff --git a/a/1.txt b/N1/1.txt index 054025a..0a65a6d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -119,7 +119,7 @@ index 85e66f4..979d14f 100644 - adapter->hw.autoneg = FALSE; + adapter->hw.autoneg = false; - if (adapter->hw.phy_type = e1000_phy_m88) { + if (adapter->hw.phy_type == e1000_phy_m88) { /* Auto-MDI/MDIX Off */ @@ -1473,7 +1474,7 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter) case e1000_82545_rev_3: @@ -127,12 +127,12 @@ index 85e66f4..979d14f 100644 default: - hw->autoneg = TRUE; + hw->autoneg = true; - if (hw->phy_type = e1000_phy_gg82563) + if (hw->phy_type == e1000_phy_gg82563) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, @@ -1607,13 +1608,13 @@ e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) *data = 0; - if (adapter->hw.media_type = e1000_media_type_internal_serdes) { + if (adapter->hw.media_type == e1000_media_type_internal_serdes) { int i = 0; - adapter->hw.serdes_link_down = TRUE; + adapter->hw.serdes_link_down = true; @@ -141,7 +141,7 @@ index 85e66f4..979d14f 100644 * could take as long as 2-3 minutes */ do { e1000_check_for_link(&adapter->hw); -- if (adapter->hw.serdes_link_down = FALSE) +- if (adapter->hw.serdes_link_down == FALSE) + if (!adapter->hw.serdes_link_down) return *data; msleep(20); @@ -154,7 +154,7 @@ index 85e66f4..979d14f 100644 + bool if_running = netif_running(netdev); set_bit(__E1000_TESTING, &adapter->flags); - if (eth_test->flags = ETH_TEST_FL_OFFLINE) { + if (eth_test->flags == ETH_TEST_FL_OFFLINE) { diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 7c6888c..4a6447d 100644 --- a/drivers/net/e1000/e1000_hw.c @@ -219,7 +219,7 @@ index 7c6888c..4a6447d 100644 @@ -450,20 +450,20 @@ e1000_set_mac_type(struct e1000_hw *hw) * FD mode */ - if (hw->mac_type = e1000_82543) + if (hw->mac_type == e1000_82543) - hw->bad_tx_carr_stats_fd = TRUE; + hw->bad_tx_carr_stats_fd = true; @@ -231,7 +231,7 @@ index 7c6888c..4a6447d 100644 /* In rare occasions, ESB2 systems would end up started without * the RX unit being turned on. */ - if (hw->mac_type = e1000_80003es2lan) + if (hw->mac_type == e1000_80003es2lan) - hw->rx_needs_kicking = TRUE; + hw->rx_needs_kicking = true; @@ -272,15 +272,15 @@ index 7c6888c..4a6447d 100644 msleep(20); break; case e1000_82573: -- if (e1000_is_onboard_nvm_eeprom(hw) = FALSE) { +- if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) { + if (!e1000_is_onboard_nvm_eeprom(hw)) { udelay(10); ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); ctrl_ext |= E1000_CTRL_EXT_EE_RST; @@ -1428,7 +1428,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw) if (hw->mac_type <= e1000_82543 || - hw->mac_type = e1000_82541 || hw->mac_type = e1000_82547 || - hw->mac_type = e1000_82541_rev_2 || hw->mac_type = e1000_82547_rev_2) + hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || + hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2) - hw->phy_reset_disable = FALSE; + hw->phy_reset_disable = false; @@ -288,7 +288,7 @@ index 7c6888c..4a6447d 100644 } @@ -1470,7 +1470,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */ - if (hw->phy_type = e1000_phy_igp) { + if (hw->phy_type == e1000_phy_igp) { /* disable lplu d3 during driver init */ - ret_val = e1000_set_d3_lplu_state(hw, FALSE); + ret_val = e1000_set_d3_lplu_state(hw, false); @@ -308,7 +308,7 @@ index 7c6888c..4a6447d 100644 * firmware will have already initialized them. We only initialize * them if the HW is not in IAMT mode. */ -- if (e1000_check_mng_mode(hw) = FALSE) { +- if (e1000_check_mng_mode(hw) == FALSE) { + if (!e1000_check_mng_mode(hw)) { /* Enable Electrical Idle on the PHY */ phy_data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE; @@ -325,14 +325,14 @@ index 7c6888c..4a6447d 100644 @@ -1932,7 +1932,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw) /* Config DSP to improve Giga link quality */ - if (hw->phy_type = e1000_phy_igp) { + if (hw->phy_type == e1000_phy_igp) { - ret_val = e1000_config_dsp_after_link_change(hw, TRUE); + ret_val = e1000_config_dsp_after_link_change(hw, true); if (ret_val) { DEBUGOUT("Error Configuring DSP after link up\n"); return ret_val; @@ -2923,7 +2923,7 @@ e1000_check_for_link(struct e1000_hw *hw) - if (hw->media_type = e1000_media_type_fiber) { + if (hw->media_type == e1000_media_type_fiber) { signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; if (status & E1000_STATUS_LU) - hw->get_link_status = FALSE; @@ -421,45 +421,45 @@ index 7c6888c..4a6447d 100644 switch (hw->mac_type) { case e1000_82543: -- if (hw->phy_id = M88E1000_E_PHY_ID) match = TRUE; -+ if (hw->phy_id = M88E1000_E_PHY_ID) match = true; +- if (hw->phy_id == M88E1000_E_PHY_ID) match = TRUE; ++ if (hw->phy_id == M88E1000_E_PHY_ID) match = true; break; case e1000_82544: -- if (hw->phy_id = M88E1000_I_PHY_ID) match = TRUE; -+ if (hw->phy_id = M88E1000_I_PHY_ID) match = true; +- if (hw->phy_id == M88E1000_I_PHY_ID) match = TRUE; ++ if (hw->phy_id == M88E1000_I_PHY_ID) match = true; break; case e1000_82540: case e1000_82545: case e1000_82545_rev_3: case e1000_82546: case e1000_82546_rev_3: -- if (hw->phy_id = M88E1011_I_PHY_ID) match = TRUE; -+ if (hw->phy_id = M88E1011_I_PHY_ID) match = true; +- if (hw->phy_id == M88E1011_I_PHY_ID) match = TRUE; ++ if (hw->phy_id == M88E1011_I_PHY_ID) match = true; break; case e1000_82541: case e1000_82541_rev_2: case e1000_82547: case e1000_82547_rev_2: -- if (hw->phy_id = IGP01E1000_I_PHY_ID) match = TRUE; -+ if (hw->phy_id = IGP01E1000_I_PHY_ID) match = true; +- if (hw->phy_id == IGP01E1000_I_PHY_ID) match = TRUE; ++ if (hw->phy_id == IGP01E1000_I_PHY_ID) match = true; break; case e1000_82573: -- if (hw->phy_id = M88E1111_I_PHY_ID) match = TRUE; -+ if (hw->phy_id = M88E1111_I_PHY_ID) match = true; +- if (hw->phy_id == M88E1111_I_PHY_ID) match = TRUE; ++ if (hw->phy_id == M88E1111_I_PHY_ID) match = true; break; case e1000_80003es2lan: -- if (hw->phy_id = GG82563_E_PHY_ID) match = TRUE; -+ if (hw->phy_id = GG82563_E_PHY_ID) match = true; +- if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE; ++ if (hw->phy_id == GG82563_E_PHY_ID) match = true; break; case e1000_ich8lan: -- if (hw->phy_id = IGP03E1000_E_PHY_ID) match = TRUE; -- if (hw->phy_id = IFE_E_PHY_ID) match = TRUE; -- if (hw->phy_id = IFE_PLUS_E_PHY_ID) match = TRUE; -- if (hw->phy_id = IFE_C_E_PHY_ID) match = TRUE; -+ if (hw->phy_id = IGP03E1000_E_PHY_ID) match = true; -+ if (hw->phy_id = IFE_E_PHY_ID) match = true; -+ if (hw->phy_id = IFE_PLUS_E_PHY_ID) match = true; -+ if (hw->phy_id = IFE_C_E_PHY_ID) match = true; +- if (hw->phy_id == IGP03E1000_E_PHY_ID) match = TRUE; +- if (hw->phy_id == IFE_E_PHY_ID) match = TRUE; +- if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = TRUE; +- if (hw->phy_id == IFE_C_E_PHY_ID) match = TRUE; ++ if (hw->phy_id == IGP03E1000_E_PHY_ID) match = true; ++ if (hw->phy_id == IFE_E_PHY_ID) match = true; ++ if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = true; ++ if (hw->phy_id == IFE_C_E_PHY_ID) match = true; break; default: DEBUGOUT1("Invalid MAC type %d\n", hw->mac_type); @@ -513,7 +513,7 @@ index 7c6888c..4a6447d 100644 } - eeprom->use_eerd = TRUE; - eeprom->use_eewr = TRUE; -- if (e1000_is_onboard_nvm_eeprom(hw) = FALSE) { +- if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) { + eeprom->use_eerd = true; + eeprom->use_eewr = true; + if (!e1000_is_onboard_nvm_eeprom(hw)) { @@ -554,8 +554,8 @@ index 7c6888c..4a6447d 100644 * directly. In this case, we need to acquire the EEPROM so that * FW or other port software does not interrupt. */ -- if (e1000_is_onboard_nvm_eeprom(hw) = TRUE && -- hw->eeprom.use_eerd = FALSE) { +- if (e1000_is_onboard_nvm_eeprom(hw) == TRUE && +- hw->eeprom.use_eerd == FALSE) { + if (e1000_is_onboard_nvm_eeprom(hw) && !hw->eeprom.use_eerd) { /* Prepare the EEPROM for bit-bang reading */ if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) @@ -563,7 +563,7 @@ index 7c6888c..4a6447d 100644 } /* Eerd register EEPROM access requires no eeprom aquire/release */ -- if (eeprom->use_eerd = TRUE) +- if (eeprom->use_eerd == TRUE) + if (eeprom->use_eerd) return e1000_read_eeprom_eerd(hw, offset, words, data); @@ -580,16 +580,16 @@ index 7c6888c..4a6447d 100644 @@ -5179,7 +5178,7 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) DEBUGFUNC("e1000_is_onboard_nvm_eeprom"); - if (hw->mac_type = e1000_ich8lan) + if (hw->mac_type == e1000_ich8lan) - return FALSE; + return false; - if (hw->mac_type = e1000_82573) { + if (hw->mac_type == e1000_82573) { eecd = E1000_READ_REG(hw, EECD); @@ -5189,10 +5188,10 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) /* If both bits are set, device is Flash type */ - if (eecd = 0x03) { + if (eecd == 0x03) { - return FALSE; + return false; } @@ -603,9 +603,9 @@ index 7c6888c..4a6447d 100644 DEBUGFUNC("e1000_validate_eeprom_checksum"); -- if ((hw->mac_type = e1000_82573) && -- (e1000_is_onboard_nvm_eeprom(hw) = FALSE)) { -+ if ((hw->mac_type = e1000_82573) && !e1000_is_onboard_nvm_eeprom(hw)) { +- if ((hw->mac_type == e1000_82573) && +- (e1000_is_onboard_nvm_eeprom(hw) == FALSE)) { ++ if ((hw->mac_type == e1000_82573) && !e1000_is_onboard_nvm_eeprom(hw)) { /* Check bit 4 of word 10h. If it is 0, firmware is done updating * 10h-12h. Checksum may need to be fixed. */ e1000_read_eeprom(hw, 0x10, 1, &eeprom_data); @@ -613,11 +613,11 @@ index 7c6888c..4a6447d 100644 } /* 82573 writes only through eewr */ -- if (eeprom->use_eewr = TRUE) +- if (eeprom->use_eewr == TRUE) + if (eeprom->use_eewr) return e1000_write_eeprom_eewr(hw, offset, words, data); - if (eeprom->type = e1000_eeprom_ich8) + if (eeprom->type == e1000_eeprom_ich8) @@ -5536,7 +5534,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) uint32_t new_bank_offset = 0; uint8_t low_byte = 0; @@ -625,7 +625,7 @@ index 7c6888c..4a6447d 100644 - boolean_t sector_write_failed = FALSE; + bool sector_write_failed = false; - if (hw->mac_type = e1000_82573) { + if (hw->mac_type == e1000_82573) { /* The flop register will be used to determine if flash type is STM */ @@ -5588,21 +5586,21 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) e1000_erase_ich8_4k_segment(hw, 0); @@ -639,7 +639,7 @@ index 7c6888c..4a6447d 100644 /* Determine whether to write the value stored * in the other NVM bank or a modified value stored * in the shadow RAM */ -- if (hw->eeprom_shadow_ram[i].modified = TRUE) { +- if (hw->eeprom_shadow_ram[i].modified == TRUE) { + if (hw->eeprom_shadow_ram[i].modified) { low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word; udelay(100); @@ -650,7 +650,8 @@ index 7c6888c..4a6447d 100644 - sector_write_failed = TRUE; + sector_write_failed = true; else { - high_byte (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); + high_byte = + (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); @@ -5616,7 +5614,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) (i << 1) + new_bank_offset, low_byte); @@ -668,7 +669,7 @@ index 7c6888c..4a6447d 100644 + /* If the write of the low byte was successful, go ahead and * write the high byte while checking to make sure that if it * is the signature byte, then it is handled properly */ -- if (sector_write_failed = FALSE) { +- if (sector_write_failed == FALSE) { + if (!sector_write_failed) { /* If the word is 0x13, then make sure the signature bits * (15:14) are 11b until the commit has completed. @@ -686,7 +687,7 @@ index 7c6888c..4a6447d 100644 /* Don't bother writing the segment valid bits if sector * programming failed. */ -- if (sector_write_failed = FALSE) { +- if (sector_write_failed == FALSE) { + if (!sector_write_failed) { /* Finally validate the new segment by setting bit 15:14 * to 10b in word 0x13 , this can be done without an @@ -704,16 +705,16 @@ index 7c6888c..4a6447d 100644 /* Reserve a spot for the Locally Administered Address to work around * an 82571 issue in which a reset on one port will reload the MAC on * the other port. */ -- if ((hw->mac_type = e1000_82571) && (hw->laa_is_present = TRUE)) -+ if ((hw->mac_type = e1000_82571) && (hw->laa_is_present)) +- if ((hw->mac_type == e1000_82571) && (hw->laa_is_present == TRUE)) ++ if ((hw->mac_type == e1000_82571) && (hw->laa_is_present)) rar_num -= 1; - if (hw->mac_type = e1000_ich8lan) + if (hw->mac_type == e1000_ich8lan) rar_num = E1000_RAR_ENTRIES_ICH8LAN; @@ -5922,7 +5920,7 @@ e1000_rar_set(struct e1000_hw *hw, case e1000_82571: case e1000_82572: case e1000_80003es2lan: -- if (hw->leave_av_bit_off = TRUE) +- if (hw->leave_av_bit_off == TRUE) + if (hw->leave_av_bit_off) break; default: @@ -743,7 +744,7 @@ index 7c6888c..4a6447d 100644 - hw->in_ifs_mode = TRUE; + hw->in_ifs_mode = true; if (hw->current_ifs_val < hw->ifs_max_val) { - if (hw->current_ifs_val = 0) + if (hw->current_ifs_val == 0) hw->current_ifs_val = hw->ifs_min_val; @@ -6477,7 +6475,7 @@ e1000_update_adaptive(struct e1000_hw *hw) } else { @@ -756,7 +757,7 @@ index 7c6888c..4a6447d 100644 } @@ -6968,7 +6966,7 @@ e1000_check_downshift(struct e1000_hw *hw) M88E1000_PSSR_DOWNSHIFT_SHIFT; - } else if (hw->phy_type = e1000_phy_ife) { + } else if (hw->phy_type == e1000_phy_ife) { /* e1000_phy_ife supports 10/100 speed only */ - hw->speed_downgraded = FALSE; + hw->speed_downgraded = false; @@ -812,12 +813,12 @@ index 7c6888c..4a6447d 100644 { uint32_t fwsm; @@ -7701,12 +7699,12 @@ e1000_check_mng_mode(struct e1000_hw *hw) - if (hw->mac_type = e1000_ich8lan) { - if ((fwsm & E1000_FWSM_MODE_MASK) = + if (hw->mac_type == e1000_ich8lan) { + if ((fwsm & E1000_FWSM_MODE_MASK) == (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) - return TRUE; + return true; - } else if ((fwsm & E1000_FWSM_MODE_MASK) = + } else if ((fwsm & E1000_FWSM_MODE_MASK) == (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) - return TRUE; + return true; @@ -875,13 +876,13 @@ index 7c6888c..4a6447d 100644 if (!(manc & E1000_MANC_RCV_TCO_EN) || !(manc & E1000_MANC_EN_MAC_ADDR_FILTER)) - return FALSE; -- if (e1000_arc_subsystem_valid(hw) = TRUE) { +- if (e1000_arc_subsystem_valid(hw) == TRUE) { + return false; + if (e1000_arc_subsystem_valid(hw)) { fwsm = E1000_READ_REG(hw, FWSM); factps = E1000_READ_REG(hw, FACTPS); - if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) = + if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) == e1000_mng_mode_pt) && !(factps & E1000_FACTPS_MNGCG)) - return TRUE; + return true; @@ -917,7 +918,7 @@ index 7c6888c..4a6447d 100644 for (i = 0; i < words; i++) { if (hw->eeprom_shadow_ram != NULL && -- hw->eeprom_shadow_ram[offset+i].modified = TRUE) { +- hw->eeprom_shadow_ram[offset+i].modified == TRUE) { + hw->eeprom_shadow_ram[offset+i].modified) { data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word; } else { @@ -1122,7 +1123,7 @@ index 0991648..37c4655 100644 break; } -- if (legacy_pba_adjust = TRUE) { +- if (legacy_pba_adjust == TRUE) { + if (legacy_pba_adjust) { if (adapter->netdev->mtu > E1000_RXBUFFER_8192) pba -= 8; /* allocate more FIFO for Tx */ @@ -1140,7 +1141,7 @@ index 0991648..37c4655 100644 /* Copper options */ - if (hw->media_type = e1000_media_type_copper) { + if (hw->media_type == e1000_media_type_copper) { hw->mdix = AUTO_ALL_MODES; - hw->disable_polarity_correction = FALSE; + hw->disable_polarity_correction = false; @@ -1158,8 +1159,8 @@ index 0991648..37c4655 100644 { @@ -1587,10 +1587,10 @@ e1000_check_64k_bound(struct e1000_adapter *adapter, * write location to cross 64k boundary due to errata 23 */ - if (adapter->hw.mac_type = e1000_82545 || - adapter->hw.mac_type = e1000_82546) { + if (adapter->hw.mac_type == e1000_82545 || + adapter->hw.mac_type == e1000_82546) { - return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; + return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; } @@ -1173,7 +1174,7 @@ index 0991648..37c4655 100644 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ if (hw->mac_type >= e1000_82543) { rxcsum = E1000_READ_REG(hw, RXCSUM); -- if (adapter->rx_csum = TRUE) { +- if (adapter->rx_csum == TRUE) { + if (adapter->rx_csum) { rxcsum |= E1000_RXCSUM_TUOFL; @@ -1204,9 +1205,9 @@ index 0991648..37c4655 100644 break; @@ -2704,7 +2704,7 @@ e1000_watchdog(unsigned long data) - if ((adapter->hw.mac_type = e1000_82571 || - adapter->hw.mac_type = e1000_82572) && -- txb2b = 0) { + if ((adapter->hw.mac_type == e1000_82571 || + adapter->hw.mac_type == e1000_82572) && +- txb2b == 0) { + !txb2b) { uint32_t tarc0; tarc0 = E1000_READ_REG(&adapter->hw, TARC0); @@ -1221,7 +1222,7 @@ index 0991648..37c4655 100644 /* With 82571 controllers, LAA may be overwritten due to controller * reset from the other port. Set the appropriate LAA in RAR[0] */ @@ -3025,12 +3025,12 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, - if (++i = tx_ring->count) i = 0; + if (++i == tx_ring->count) i = 0; tx_ring->next_to_use = i; - return TRUE; @@ -1237,7 +1238,7 @@ index 0991648..37c4655 100644 struct sk_buff *skb) { @@ -3060,10 +3060,10 @@ e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, - if (unlikely(++i = tx_ring->count)) i = 0; + if (unlikely(++i == tx_ring->count)) i = 0; tx_ring->next_to_use = i; - return TRUE; @@ -1275,7 +1276,7 @@ index 0991648..37c4655 100644 + for (cleaned = false; !cleaned; ) { tx_desc = E1000_TX_DESC(*tx_ring, i); buffer_info = &tx_ring->buffer_info[i]; - cleaned = (i = eop); + cleaned = (i == eop); @@ -4105,7 +4105,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, if (adapter->detect_tx_hung) { /* Detect a transmit hang in hardware, this serializes the diff --git a/a/content_digest b/N1/content_digest index 29c2890..287aa71 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,7 +3,7 @@ "ref\047D032FA.9000909@intel.com\0" "From\0Joe Perches <joe@perches.com>\0" "Subject\0[PATCH] drivers/net/e1000 - Convert boolean_t to bool\0" - "Date\0Fri, 07 Mar 2008 01:22:41 +0000\0" + "Date\0Thu, 06 Mar 2008 17:22:41 -0800\0" "To\0Kok" " Auke <auke-jan.h.kok@intel.com>\0" "Cc\0e1000-devel@lists.sourceforge.net" @@ -132,7 +132,7 @@ "-\tadapter->hw.autoneg = FALSE;\n" "+\tadapter->hw.autoneg = false;\n" " \n" - " \tif (adapter->hw.phy_type = e1000_phy_m88) {\n" + " \tif (adapter->hw.phy_type == e1000_phy_m88) {\n" " \t\t/* Auto-MDI/MDIX Off */\n" "@@ -1473,7 +1474,7 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter)\n" " \tcase e1000_82545_rev_3:\n" @@ -140,12 +140,12 @@ " \tdefault:\n" "-\t\thw->autoneg = TRUE;\n" "+\t\thw->autoneg = true;\n" - " \t\tif (hw->phy_type = e1000_phy_gg82563)\n" + " \t\tif (hw->phy_type == e1000_phy_gg82563)\n" " \t\t\te1000_write_phy_reg(hw,\n" " \t\t\t\t\t GG82563_PHY_KMRN_MODE_CTRL,\n" "@@ -1607,13 +1608,13 @@ e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)\n" " \t*data = 0;\n" - " \tif (adapter->hw.media_type = e1000_media_type_internal_serdes) {\n" + " \tif (adapter->hw.media_type == e1000_media_type_internal_serdes) {\n" " \t\tint i = 0;\n" "-\t\tadapter->hw.serdes_link_down = TRUE;\n" "+\t\tadapter->hw.serdes_link_down = true;\n" @@ -154,7 +154,7 @@ " \t\t * could take as long as 2-3 minutes */\n" " \t\tdo {\n" " \t\t\te1000_check_for_link(&adapter->hw);\n" - "-\t\t\tif (adapter->hw.serdes_link_down = FALSE)\n" + "-\t\t\tif (adapter->hw.serdes_link_down == FALSE)\n" "+\t\t\tif (!adapter->hw.serdes_link_down)\n" " \t\t\t\treturn *data;\n" " \t\t\tmsleep(20);\n" @@ -167,7 +167,7 @@ "+\tbool if_running = netif_running(netdev);\n" " \n" " \tset_bit(__E1000_TESTING, &adapter->flags);\n" - " \tif (eth_test->flags = ETH_TEST_FL_OFFLINE) {\n" + " \tif (eth_test->flags == ETH_TEST_FL_OFFLINE) {\n" "diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c\n" "index 7c6888c..4a6447d 100644\n" "--- a/drivers/net/e1000/e1000_hw.c\n" @@ -232,7 +232,7 @@ "@@ -450,20 +450,20 @@ e1000_set_mac_type(struct e1000_hw *hw)\n" " \t * FD mode\n" " \t */\n" - " \tif (hw->mac_type = e1000_82543)\n" + " \tif (hw->mac_type == e1000_82543)\n" "-\t\thw->bad_tx_carr_stats_fd = TRUE;\n" "+\t\thw->bad_tx_carr_stats_fd = true;\n" " \n" @@ -244,7 +244,7 @@ " \t/* In rare occasions, ESB2 systems would end up started without\n" " \t * the RX unit being turned on.\n" " \t */\n" - " \tif (hw->mac_type = e1000_80003es2lan)\n" + " \tif (hw->mac_type == e1000_80003es2lan)\n" "-\t\thw->rx_needs_kicking = TRUE;\n" "+\t\thw->rx_needs_kicking = true;\n" " \n" @@ -285,15 +285,15 @@ " msleep(20);\n" " break;\n" " case e1000_82573:\n" - "- if (e1000_is_onboard_nvm_eeprom(hw) = FALSE) {\n" + "- if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) {\n" "+ if (!e1000_is_onboard_nvm_eeprom(hw)) {\n" " udelay(10);\n" " ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);\n" " ctrl_ext |= E1000_CTRL_EXT_EE_RST;\n" "@@ -1428,7 +1428,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw)\n" " if (hw->mac_type <= e1000_82543 ||\n" - " hw->mac_type = e1000_82541 || hw->mac_type = e1000_82547 ||\n" - " hw->mac_type = e1000_82541_rev_2 || hw->mac_type = e1000_82547_rev_2)\n" + " hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 ||\n" + " hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2)\n" "- hw->phy_reset_disable = FALSE;\n" "+ hw->phy_reset_disable = false;\n" " \n" @@ -301,7 +301,7 @@ " }\n" "@@ -1470,7 +1470,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)\n" " /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */\n" - " if (hw->phy_type = e1000_phy_igp) {\n" + " if (hw->phy_type == e1000_phy_igp) {\n" " /* disable lplu d3 during driver init */\n" "- ret_val = e1000_set_d3_lplu_state(hw, FALSE);\n" "+ ret_val = e1000_set_d3_lplu_state(hw, false);\n" @@ -321,7 +321,7 @@ " * firmware will have already initialized them. We only initialize\n" " * them if the HW is not in IAMT mode.\n" " */\n" - "- if (e1000_check_mng_mode(hw) = FALSE) {\n" + "- if (e1000_check_mng_mode(hw) == FALSE) {\n" "+ if (!e1000_check_mng_mode(hw)) {\n" " /* Enable Electrical Idle on the PHY */\n" " phy_data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;\n" @@ -338,14 +338,14 @@ "@@ -1932,7 +1932,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)\n" " \n" " /* Config DSP to improve Giga link quality */\n" - " if (hw->phy_type = e1000_phy_igp) {\n" + " if (hw->phy_type == e1000_phy_igp) {\n" "- ret_val = e1000_config_dsp_after_link_change(hw, TRUE);\n" "+ ret_val = e1000_config_dsp_after_link_change(hw, true);\n" " if (ret_val) {\n" " DEBUGOUT(\"Error Configuring DSP after link up\\n\");\n" " return ret_val;\n" "@@ -2923,7 +2923,7 @@ e1000_check_for_link(struct e1000_hw *hw)\n" - " if (hw->media_type = e1000_media_type_fiber) {\n" + " if (hw->media_type == e1000_media_type_fiber) {\n" " signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0;\n" " if (status & E1000_STATUS_LU)\n" "- hw->get_link_status = FALSE;\n" @@ -434,45 +434,45 @@ " \n" " switch (hw->mac_type) {\n" " case e1000_82543:\n" - "- if (hw->phy_id = M88E1000_E_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = M88E1000_E_PHY_ID) match = true;\n" + "- if (hw->phy_id == M88E1000_E_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == M88E1000_E_PHY_ID) match = true;\n" " break;\n" " case e1000_82544:\n" - "- if (hw->phy_id = M88E1000_I_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = M88E1000_I_PHY_ID) match = true;\n" + "- if (hw->phy_id == M88E1000_I_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == M88E1000_I_PHY_ID) match = true;\n" " break;\n" " case e1000_82540:\n" " case e1000_82545:\n" " case e1000_82545_rev_3:\n" " case e1000_82546:\n" " case e1000_82546_rev_3:\n" - "- if (hw->phy_id = M88E1011_I_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = M88E1011_I_PHY_ID) match = true;\n" + "- if (hw->phy_id == M88E1011_I_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == M88E1011_I_PHY_ID) match = true;\n" " break;\n" " case e1000_82541:\n" " case e1000_82541_rev_2:\n" " case e1000_82547:\n" " case e1000_82547_rev_2:\n" - "- if (hw->phy_id = IGP01E1000_I_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = IGP01E1000_I_PHY_ID) match = true;\n" + "- if (hw->phy_id == IGP01E1000_I_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == IGP01E1000_I_PHY_ID) match = true;\n" " break;\n" " case e1000_82573:\n" - "- if (hw->phy_id = M88E1111_I_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = M88E1111_I_PHY_ID) match = true;\n" + "- if (hw->phy_id == M88E1111_I_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == M88E1111_I_PHY_ID) match = true;\n" " break;\n" " case e1000_80003es2lan:\n" - "- if (hw->phy_id = GG82563_E_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = GG82563_E_PHY_ID) match = true;\n" + "- if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == GG82563_E_PHY_ID) match = true;\n" " break;\n" " case e1000_ich8lan:\n" - "- if (hw->phy_id = IGP03E1000_E_PHY_ID) match = TRUE;\n" - "- if (hw->phy_id = IFE_E_PHY_ID) match = TRUE;\n" - "- if (hw->phy_id = IFE_PLUS_E_PHY_ID) match = TRUE;\n" - "- if (hw->phy_id = IFE_C_E_PHY_ID) match = TRUE;\n" - "+ if (hw->phy_id = IGP03E1000_E_PHY_ID) match = true;\n" - "+ if (hw->phy_id = IFE_E_PHY_ID) match = true;\n" - "+ if (hw->phy_id = IFE_PLUS_E_PHY_ID) match = true;\n" - "+ if (hw->phy_id = IFE_C_E_PHY_ID) match = true;\n" + "- if (hw->phy_id == IGP03E1000_E_PHY_ID) match = TRUE;\n" + "- if (hw->phy_id == IFE_E_PHY_ID) match = TRUE;\n" + "- if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = TRUE;\n" + "- if (hw->phy_id == IFE_C_E_PHY_ID) match = TRUE;\n" + "+ if (hw->phy_id == IGP03E1000_E_PHY_ID) match = true;\n" + "+ if (hw->phy_id == IFE_E_PHY_ID) match = true;\n" + "+ if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = true;\n" + "+ if (hw->phy_id == IFE_C_E_PHY_ID) match = true;\n" " break;\n" " default:\n" " DEBUGOUT1(\"Invalid MAC type %d\\n\", hw->mac_type);\n" @@ -526,7 +526,7 @@ " }\n" "- eeprom->use_eerd = TRUE;\n" "- eeprom->use_eewr = TRUE;\n" - "- if (e1000_is_onboard_nvm_eeprom(hw) = FALSE) {\n" + "- if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) {\n" "+ eeprom->use_eerd = true;\n" "+ eeprom->use_eewr = true;\n" "+ if (!e1000_is_onboard_nvm_eeprom(hw)) {\n" @@ -567,8 +567,8 @@ " * directly. In this case, we need to acquire the EEPROM so that\n" " * FW or other port software does not interrupt.\n" " */\n" - "- if (e1000_is_onboard_nvm_eeprom(hw) = TRUE &&\n" - "- hw->eeprom.use_eerd = FALSE) {\n" + "- if (e1000_is_onboard_nvm_eeprom(hw) == TRUE &&\n" + "- hw->eeprom.use_eerd == FALSE) {\n" "+ if (e1000_is_onboard_nvm_eeprom(hw) && !hw->eeprom.use_eerd) {\n" " /* Prepare the EEPROM for bit-bang reading */\n" " if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)\n" @@ -576,7 +576,7 @@ " }\n" " \n" " /* Eerd register EEPROM access requires no eeprom aquire/release */\n" - "- if (eeprom->use_eerd = TRUE)\n" + "- if (eeprom->use_eerd == TRUE)\n" "+ if (eeprom->use_eerd)\n" " return e1000_read_eeprom_eerd(hw, offset, words, data);\n" " \n" @@ -593,16 +593,16 @@ "@@ -5179,7 +5178,7 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)\n" " DEBUGFUNC(\"e1000_is_onboard_nvm_eeprom\");\n" " \n" - " if (hw->mac_type = e1000_ich8lan)\n" + " if (hw->mac_type == e1000_ich8lan)\n" "- return FALSE;\n" "+ return false;\n" " \n" - " if (hw->mac_type = e1000_82573) {\n" + " if (hw->mac_type == e1000_82573) {\n" " eecd = E1000_READ_REG(hw, EECD);\n" "@@ -5189,10 +5188,10 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)\n" " \n" " /* If both bits are set, device is Flash type */\n" - " if (eecd = 0x03) {\n" + " if (eecd == 0x03) {\n" "- return FALSE;\n" "+ return false;\n" " }\n" @@ -616,9 +616,9 @@ " \n" " DEBUGFUNC(\"e1000_validate_eeprom_checksum\");\n" " \n" - "- if ((hw->mac_type = e1000_82573) &&\n" - "- (e1000_is_onboard_nvm_eeprom(hw) = FALSE)) {\n" - "+ if ((hw->mac_type = e1000_82573) && !e1000_is_onboard_nvm_eeprom(hw)) {\n" + "- if ((hw->mac_type == e1000_82573) &&\n" + "- (e1000_is_onboard_nvm_eeprom(hw) == FALSE)) {\n" + "+ if ((hw->mac_type == e1000_82573) && !e1000_is_onboard_nvm_eeprom(hw)) {\n" " /* Check bit 4 of word 10h. If it is 0, firmware is done updating\n" " * 10h-12h. Checksum may need to be fixed. */\n" " e1000_read_eeprom(hw, 0x10, 1, &eeprom_data);\n" @@ -626,11 +626,11 @@ " }\n" " \n" " /* 82573 writes only through eewr */\n" - "- if (eeprom->use_eewr = TRUE)\n" + "- if (eeprom->use_eewr == TRUE)\n" "+ if (eeprom->use_eewr)\n" " return e1000_write_eeprom_eewr(hw, offset, words, data);\n" " \n" - " if (eeprom->type = e1000_eeprom_ich8)\n" + " if (eeprom->type == e1000_eeprom_ich8)\n" "@@ -5536,7 +5534,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw)\n" " uint32_t new_bank_offset = 0;\n" " uint8_t low_byte = 0;\n" @@ -638,7 +638,7 @@ "- boolean_t sector_write_failed = FALSE;\n" "+ bool sector_write_failed = false;\n" " \n" - " if (hw->mac_type = e1000_82573) {\n" + " if (hw->mac_type == e1000_82573) {\n" " /* The flop register will be used to determine if flash type is STM */\n" "@@ -5588,21 +5586,21 @@ e1000_commit_shadow_ram(struct e1000_hw *hw)\n" " e1000_erase_ich8_4k_segment(hw, 0);\n" @@ -652,7 +652,7 @@ " /* Determine whether to write the value stored\n" " * in the other NVM bank or a modified value stored\n" " * in the shadow RAM */\n" - "- if (hw->eeprom_shadow_ram[i].modified = TRUE) {\n" + "- if (hw->eeprom_shadow_ram[i].modified == TRUE) {\n" "+ if (hw->eeprom_shadow_ram[i].modified) {\n" " low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word;\n" " udelay(100);\n" @@ -663,7 +663,8 @@ "- sector_write_failed = TRUE;\n" "+ sector_write_failed = true;\n" " else {\n" - " high_byte (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8);\n" + " high_byte =\n" + " (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8);\n" "@@ -5616,7 +5614,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw)\n" " (i << 1) + new_bank_offset, low_byte);\n" " \n" @@ -681,7 +682,7 @@ "+ /* If the write of the low byte was successful, go ahead and\n" " * write the high byte while checking to make sure that if it\n" " * is the signature byte, then it is handled properly */\n" - "- if (sector_write_failed = FALSE) {\n" + "- if (sector_write_failed == FALSE) {\n" "+ if (!sector_write_failed) {\n" " /* If the word is 0x13, then make sure the signature bits\n" " * (15:14) are 11b until the commit has completed.\n" @@ -699,7 +700,7 @@ " \n" " /* Don't bother writing the segment valid bits if sector\n" " * programming failed. */\n" - "- if (sector_write_failed = FALSE) {\n" + "- if (sector_write_failed == FALSE) {\n" "+ if (!sector_write_failed) {\n" " /* Finally validate the new segment by setting bit 15:14\n" " * to 10b in word 0x13 , this can be done without an\n" @@ -717,16 +718,16 @@ " /* Reserve a spot for the Locally Administered Address to work around\n" " * an 82571 issue in which a reset on one port will reload the MAC on\n" " * the other port. */\n" - "- if ((hw->mac_type = e1000_82571) && (hw->laa_is_present = TRUE))\n" - "+ if ((hw->mac_type = e1000_82571) && (hw->laa_is_present))\n" + "- if ((hw->mac_type == e1000_82571) && (hw->laa_is_present == TRUE))\n" + "+ if ((hw->mac_type == e1000_82571) && (hw->laa_is_present))\n" " rar_num -= 1;\n" - " if (hw->mac_type = e1000_ich8lan)\n" + " if (hw->mac_type == e1000_ich8lan)\n" " rar_num = E1000_RAR_ENTRIES_ICH8LAN;\n" "@@ -5922,7 +5920,7 @@ e1000_rar_set(struct e1000_hw *hw,\n" " case e1000_82571:\n" " case e1000_82572:\n" " case e1000_80003es2lan:\n" - "- if (hw->leave_av_bit_off = TRUE)\n" + "- if (hw->leave_av_bit_off == TRUE)\n" "+ if (hw->leave_av_bit_off)\n" " break;\n" " default:\n" @@ -756,7 +757,7 @@ "- hw->in_ifs_mode = TRUE;\n" "+ hw->in_ifs_mode = true;\n" " if (hw->current_ifs_val < hw->ifs_max_val) {\n" - " if (hw->current_ifs_val = 0)\n" + " if (hw->current_ifs_val == 0)\n" " hw->current_ifs_val = hw->ifs_min_val;\n" "@@ -6477,7 +6475,7 @@ e1000_update_adaptive(struct e1000_hw *hw)\n" " } else {\n" @@ -769,7 +770,7 @@ " }\n" "@@ -6968,7 +6966,7 @@ e1000_check_downshift(struct e1000_hw *hw)\n" " M88E1000_PSSR_DOWNSHIFT_SHIFT;\n" - " } else if (hw->phy_type = e1000_phy_ife) {\n" + " } else if (hw->phy_type == e1000_phy_ife) {\n" " /* e1000_phy_ife supports 10/100 speed only */\n" "- hw->speed_downgraded = FALSE;\n" "+ hw->speed_downgraded = false;\n" @@ -825,12 +826,12 @@ " {\n" " uint32_t fwsm;\n" "@@ -7701,12 +7699,12 @@ e1000_check_mng_mode(struct e1000_hw *hw)\n" - " if (hw->mac_type = e1000_ich8lan) {\n" - " if ((fwsm & E1000_FWSM_MODE_MASK) =\n" + " if (hw->mac_type == e1000_ich8lan) {\n" + " if ((fwsm & E1000_FWSM_MODE_MASK) ==\n" " (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT))\n" "- return TRUE;\n" "+ return true;\n" - " } else if ((fwsm & E1000_FWSM_MODE_MASK) =\n" + " } else if ((fwsm & E1000_FWSM_MODE_MASK) ==\n" " (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))\n" "- return TRUE;\n" "+ return true;\n" @@ -888,13 +889,13 @@ " if (!(manc & E1000_MANC_RCV_TCO_EN) ||\n" " !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))\n" "- return FALSE;\n" - "- if (e1000_arc_subsystem_valid(hw) = TRUE) {\n" + "- if (e1000_arc_subsystem_valid(hw) == TRUE) {\n" "+ return false;\n" "+ if (e1000_arc_subsystem_valid(hw)) {\n" " fwsm = E1000_READ_REG(hw, FWSM);\n" " factps = E1000_READ_REG(hw, FACTPS);\n" " \n" - " if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) =\n" + " if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) ==\n" " e1000_mng_mode_pt) && !(factps & E1000_FACTPS_MNGCG))\n" "- return TRUE;\n" "+ return true;\n" @@ -930,7 +931,7 @@ " \n" " for (i = 0; i < words; i++) {\n" " if (hw->eeprom_shadow_ram != NULL &&\n" - "- hw->eeprom_shadow_ram[offset+i].modified = TRUE) {\n" + "- hw->eeprom_shadow_ram[offset+i].modified == TRUE) {\n" "+ hw->eeprom_shadow_ram[offset+i].modified) {\n" " data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word;\n" " } else {\n" @@ -1135,7 +1136,7 @@ " \t\tbreak;\n" " \t}\n" " \n" - "-\tif (legacy_pba_adjust = TRUE) {\n" + "-\tif (legacy_pba_adjust == TRUE) {\n" "+\tif (legacy_pba_adjust) {\n" " \t\tif (adapter->netdev->mtu > E1000_RXBUFFER_8192)\n" " \t\t\tpba -= 8; /* allocate more FIFO for Tx */\n" @@ -1153,7 +1154,7 @@ " \n" " \t/* Copper options */\n" " \n" - " \tif (hw->media_type = e1000_media_type_copper) {\n" + " \tif (hw->media_type == e1000_media_type_copper) {\n" " \t\thw->mdix = AUTO_ALL_MODES;\n" "-\t\thw->disable_polarity_correction = FALSE;\n" "+\t\thw->disable_polarity_correction = false;\n" @@ -1171,8 +1172,8 @@ " {\n" "@@ -1587,10 +1587,10 @@ e1000_check_64k_bound(struct e1000_adapter *adapter,\n" " \t * write location to cross 64k boundary due to errata 23 */\n" - " \tif (adapter->hw.mac_type = e1000_82545 ||\n" - " \t adapter->hw.mac_type = e1000_82546) {\n" + " \tif (adapter->hw.mac_type == e1000_82545 ||\n" + " \t adapter->hw.mac_type == e1000_82546) {\n" "-\t\treturn ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;\n" "+\t\treturn ((begin ^ (end - 1)) >> 16) != 0 ? false : true;\n" " \t}\n" @@ -1186,7 +1187,7 @@ " \t/* Enable 82543 Receive Checksum Offload for TCP and UDP */\n" " \tif (hw->mac_type >= e1000_82543) {\n" " \t\trxcsum = E1000_READ_REG(hw, RXCSUM);\n" - "-\t\tif (adapter->rx_csum = TRUE) {\n" + "-\t\tif (adapter->rx_csum == TRUE) {\n" "+\t\tif (adapter->rx_csum) {\n" " \t\t\trxcsum |= E1000_RXCSUM_TUOFL;\n" " \n" @@ -1217,9 +1218,9 @@ " \t\t\t\tbreak;\n" "@@ -2704,7 +2704,7 @@ e1000_watchdog(unsigned long data)\n" " \n" - " \t\t\tif ((adapter->hw.mac_type = e1000_82571 ||\n" - " \t\t\t adapter->hw.mac_type = e1000_82572) &&\n" - "-\t\t\t txb2b = 0) {\n" + " \t\t\tif ((adapter->hw.mac_type == e1000_82571 ||\n" + " \t\t\t adapter->hw.mac_type == e1000_82572) &&\n" + "-\t\t\t txb2b == 0) {\n" "+\t\t\t !txb2b) {\n" " \t\t\t\tuint32_t tarc0;\n" " \t\t\t\ttarc0 = E1000_READ_REG(&adapter->hw, TARC0);\n" @@ -1234,7 +1235,7 @@ " \t/* With 82571 controllers, LAA may be overwritten due to controller\n" " \t * reset from the other port. Set the appropriate LAA in RAR[0] */\n" "@@ -3025,12 +3025,12 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,\n" - " \t\tif (++i = tx_ring->count) i = 0;\n" + " \t\tif (++i == tx_ring->count) i = 0;\n" " \t\ttx_ring->next_to_use = i;\n" " \n" "-\t\treturn TRUE;\n" @@ -1250,7 +1251,7 @@ " struct sk_buff *skb)\n" " {\n" "@@ -3060,10 +3060,10 @@ e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,\n" - " \t\tif (unlikely(++i = tx_ring->count)) i = 0;\n" + " \t\tif (unlikely(++i == tx_ring->count)) i = 0;\n" " \t\ttx_ring->next_to_use = i;\n" " \n" "-\t\treturn TRUE;\n" @@ -1288,7 +1289,7 @@ "+\t\tfor (cleaned = false; !cleaned; ) {\n" " \t\t\ttx_desc = E1000_TX_DESC(*tx_ring, i);\n" " \t\t\tbuffer_info = &tx_ring->buffer_info[i];\n" - " \t\t\tcleaned = (i = eop);\n" + " \t\t\tcleaned = (i == eop);\n" "@@ -4105,7 +4105,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter,\n" " \tif (adapter->detect_tx_hung) {\n" " \t\t/* Detect a transmit hang in hardware, this serializes the\n" @@ -1371,4 +1372,4 @@ " #define DEBUGOUT(S)\t\tprintk(KERN_DEBUG S \"\\n\")\n" " #define DEBUGOUT1(S, A...)\tprintk(KERN_DEBUG S \"\\n\", A)" -ffca74270c71e91dc8a429466dee34171bf12c919bc2f76b1d9e0d1dcfdbe2e9 +d168c45e01f3f8888d6aeee7cca569b530777dff8f99a7ed3c8e88db2afdbdbc
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