Re: [lttng-dev] [PATCH urcu 3/4] Use DMB only on ARMv7

[Mathieu Desnoyers via lttng-dev <lttng-dev@lists.lttng.org>]

Merged in liburcu master, thanks!

Mathieu

----- On Dec 15, 2020, at 11:28 AM, Michael Jeanson mjeanson@efficios.com wrote:

> Remove the configure time CONFIG_RCU_ARM_HAVE_DMB option and replace it
> by compile time detection based on the ARM ISA version. This makes sure
> we unconditionnaly use the DMB instruction only on ARMv7 where it's part
> of the baseline ISA.
> 
> This will change the behavior on ARMv6 platform that possibly have this
> instruction but it was probably already broken since we use the 'ISH'
> option which doesn't seem to be valid on this ISA.
> 
> This will also allow sharing headers in a multi-arch environment and
> reduce the build system complexity.
> 
> Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
> Cc: Jason Wessel <jason.wessel@windriver.com>
> Change-Id: I8e56ada55148d8e0f198c3d2e741ea414de5fef2
> ---
> configure.ac             | 19 -------------------
> include/urcu/arch.h      |  7 +++++++
> include/urcu/arch/arm.h  | 13 +++++++++++--
> include/urcu/config.h.in |  3 ---
> 4 files changed, 18 insertions(+), 24 deletions(-)
> 
> diff --git a/configure.ac b/configure.ac
> index d1d43e6..daa967a 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -21,7 +21,6 @@ m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
> AC_REQUIRE_AUX_FILE([tap-driver.sh])
> 
> AH_TEMPLATE([CONFIG_RCU_SMP], [Enable SMP support. With SMP support enabled,
> uniprocessors are also supported. With SMP support disabled, UP systems work
> fine, but the behavior of SMP systems is undefined.])
> -AH_TEMPLATE([CONFIG_RCU_ARM_HAVE_DMB], [Use the dmb instruction if available
> for use on ARM.])
> AH_TEMPLATE([CONFIG_RCU_TLS], [TLS provided by the compiler.])
> AH_TEMPLATE([CONFIG_RCU_HAVE_CLOCK_GETTIME], [clock_gettime() is detected.])
> AH_TEMPLATE([CONFIG_RCU_FORCE_SYS_MEMBARRIER], [Require the operating system to
> support the membarrier system call for default and bulletproof flavors.])
> @@ -124,24 +123,6 @@ AS_IF([test "$host_cpu" = "armv7l"],[
> 	AM_CFLAGS="$AM_CFLAGS -mcpu=cortex-a9 -mtune=cortex-a9 -O1"
> ])
> 
> -# ARM-specific checks
> -AS_CASE([$host_cpu], [arm*], [
> -	AC_MSG_CHECKING([for dmb instruction])
> -	AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
> -				int main()
> -				{
> -					asm volatile("dmb":::"memory");
> -					return 0;
> -				}
> -		]])
> -	],[
> -		AC_MSG_RESULT([yes])
> -		AC_DEFINE([CONFIG_RCU_ARM_HAVE_DMB], [1])
> -	],[
> -		AC_MSG_RESULT([no])
> -	])
> -])
> -
> # Search for clock_gettime
> AC_SEARCH_LIBS([clock_gettime], [rt], [
> 	AC_DEFINE([CONFIG_RCU_HAVE_CLOCK_GETTIME], [1])
> diff --git a/include/urcu/arch.h b/include/urcu/arch.h
> index c4b8bc2..620743c 100644
> --- a/include/urcu/arch.h
> +++ b/include/urcu/arch.h
> @@ -41,6 +41,7 @@
>  * URCU_ARCH_ALPHA : All DEC Alpha variants
>  * URCU_ARCH_IA64 : All Intel Itanium variants
>  * URCU_ARCH_ARM : All ARM 32 bits variants
> + *   URCU_ARCH_ARMV7 : All ARMv7 ISA variants
>  * URCU_ARCH_AARCH64 : All ARM 64 bits variants
>  * URCU_ARCH_MIPS : All MIPS variants
>  * URCU_ARCH_NIOS2 : All Intel / Altera NIOS II variants
> @@ -105,6 +106,12 @@
> #define URCU_ARCH_IA64 1
> #include <urcu/arch/ia64.h>
> 
> +#elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7__))
> +
> +#define URCU_ARCH_ARMV7 1
> +#define URCU_ARCH_ARM 1
> +#include <urcu/arch/arm.h>
> +
> #elif (defined(__arm__) || defined(__arm))
> 
> #define URCU_ARCH_ARM 1
> diff --git a/include/urcu/arch/arm.h b/include/urcu/arch/arm.h
> index e904b06..54ca4fa 100644
> --- a/include/urcu/arch/arm.h
> +++ b/include/urcu/arch/arm.h
> @@ -30,7 +30,15 @@
> extern "C" {
> #endif
> 
> -#ifdef CONFIG_RCU_ARM_HAVE_DMB
> +/*
> + * Using DMB is faster than the builtin __sync_synchronize and this instruction
> is
> + * part of the baseline ARMv7 ISA.
> + */
> +#ifdef URCU_ARCH_ARMV7
> +
> +/* For backwards compat. */
> +#define CONFIG_RCU_ARM_HAVE_DMB 1
> +
> /*
>  * Issues full system DMB operation.
>  */
> @@ -44,7 +52,8 @@ extern "C" {
> #define cmm_smp_mb()	__asm__ __volatile__ ("dmb ish":::"memory")
> #define cmm_smp_rmb()	__asm__ __volatile__ ("dmb ish":::"memory")
> #define cmm_smp_wmb()	__asm__ __volatile__ ("dmb ish":::"memory")
> -#endif /* CONFIG_RCU_ARM_HAVE_DMB */
> +
> +#endif /* URCU_ARCH_ARMV7 */
> 
> #include <stdlib.h>
> #include <sys/time.h>
> diff --git a/include/urcu/config.h.in b/include/urcu/config.h.in
> index faf7817..99d763a 100644
> --- a/include/urcu/config.h.in
> +++ b/include/urcu/config.h.in
> @@ -5,9 +5,6 @@
>    behavior of SMP systems is undefined. */
> #undef CONFIG_RCU_SMP
> 
> -/* Use the dmb instruction is available for use on ARM. */
> -#undef CONFIG_RCU_ARM_HAVE_DMB
> -
> /* TLS provided by the compiler. */
> #undef CONFIG_RCU_TLS
> 
> --
> 2.29.2

-- 
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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