From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerone Young Date: Mon, 09 Jun 2008 23:56:36 +0000 Subject: Re: [PATCH] [v5] Add gdb break point support to PowerPC kvm Message-Id: <1213055796.12472.2.camel@thinkpadL> List-Id: References: <1664758e846c292f5882.1213035589@thinkpadL> In-Reply-To: <1664758e846c292f5882.1213035589@thinkpadL> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: kvm-ppc@vger.kernel.org On Mon, 2008-06-09 at 17:56 -0500, Hollis Blanchard wrote: > On Mon, 2008-06-09 at 16:08 -0500, Jerone Young wrote: > >=20 > > > You also have not addressed the case I pointed out where an IAC > > matches > > > after you've programmed it but before you've entered the guest. > >=20 > > Basically can disable them in the dbcr0 before we do any switching out > > of registers. >=20 > We'll have to enable DBCR0 =EF=BB=BFsome time, right? >=20 Yes it gets enabled when when the guest cuts on the bits it wants & the we restre the host DBCR0. > > If an IAC is matched before we enter the guest it will be caught host > > that catches it. >=20 > But that won't happen because you've disabled MSR[DE]. Ah... you don't rember the whole imprecise interrupts ;-) . When MSR[DE] =3D0 and an IAC will go off but not at the exact address. This was fun figuring out. I also have a bug in this patch. I placed the wrong definitions when disabling the debug interrupts. I'll respin again. Look things over more carefully this time. >=20