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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: David Howells <dhowells@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
	linuxppc-dev@ozlabs.org
Subject: Re: Level IRQ handling on Xilinx INTC with ARCH=powerpc
Date: Wed, 30 Jul 2008 07:35:23 +1000	[thread overview]
Message-ID: <1217367323.11188.263.camel@pasglop> (raw)
In-Reply-To: <16359.1217340857@redhat.com>

On Tue, 2008-07-29 at 15:14 +0100, David Howells wrote:
> Sergey Temerkhanov <temerkhanov@yandex.ru> wrote:
> 
> > And handle_level_irq() which is currently used as high-level IRQ handler for
> > Xilinx INTC only tries to acknowledge IRQ before ISR call. So that the IRQ
> > remains asserted in INTC and after the call to desc->chip->unmask() causes
> > spurious attempt to process the same IRQ again. However, call to
> > desc->chip->ack() this time finishes the required procedure of IRQ
> > acknowledge.
> 
> I think I'm seeing the same on the MN10300 arch with its builtin PIC.  My
> soultion was to make unmask() also clear the IRQ latch in the PIC for that
> channel.  We perhaps want an unmask_ack() op.

I've heard about similar issues on other setups... I dislike having a
separate op though, not sure what's the best approach. Another one is to
write a different level handler for such PICs, though that somewhat
sucks too. CC'ing Ingo and Thomas who may have a better idea.

Ben.

  reply	other threads:[~2008-07-29 21:35 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-07-29 11:58 Level IRQ handling on Xilinx INTC with ARCH=powerpc Sergey Temerkhanov
2008-07-29 14:14 ` David Howells
2008-07-29 21:35   ` Benjamin Herrenschmidt [this message]
2008-08-08  9:31 ` [PATCH] " Sergey Temerkhanov

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