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From: Kumar Gala <galak@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [WIP][PATCH 03/11] Clean up usage of icache_disable/dcache_disable
Date: Tue, 12 Aug 2008 08:44:28 -0500	[thread overview]
Message-ID: <1218548676-25159-4-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <1218548676-25159-3-git-send-email-galak@kernel.crashing.org>

There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache.  All callers of invalidate_l1_instruction_cache()
call icache_disable() right after.  Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.

Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 board/Marvell/db64360/db64360.c           |    5 -----
 board/Marvell/db64460/db64460.c           |    5 -----
 board/esd/cpci750/cpci750.c               |    4 ----
 board/freescale/mpc7448hpc2/mpc7448hpc2.c |    2 --
 board/prodrive/p3mx/p3mx.c                |    2 --
 common/cmd_bootm.c                        |    2 --
 cpu/74xx_7xx/cache.S                      |    4 ++++
 cpu/mpc86xx/cache.S                       |    4 ++++
 8 files changed, 8 insertions(+), 20 deletions(-)

diff --git a/board/Marvell/db64360/db64360.c b/board/Marvell/db64360/db64360.c
index a2ab2d7..2a810a6 100644
--- a/board/Marvell/db64360/db64360.c
+++ b/board/Marvell/db64360/db64360.c
@@ -51,9 +51,6 @@
 #define DP(x)
 #endif
 
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
-
 /* ------------------------------------------------------------------------- */
 
 /* this is the current GT register space location */
@@ -930,7 +927,5 @@ void board_prebootm_init ()
 	my_remap_gt_regs_bootm (CFG_GT_REGS, BRIDGE_REG_BASE_BOOTM);
 
 	icache_disable ();
-	invalidate_l1_instruction_cache ();
-	flush_data_cache ();
 	dcache_disable ();
 }
diff --git a/board/Marvell/db64460/db64460.c b/board/Marvell/db64460/db64460.c
index a4abf8d..1ae898d 100644
--- a/board/Marvell/db64460/db64460.c
+++ b/board/Marvell/db64460/db64460.c
@@ -51,9 +51,6 @@
 #define DP(x)
 #endif
 
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
-
 /* ------------------------------------------------------------------------- */
 
 /* this is the current GT register space location */
@@ -930,7 +927,5 @@ void board_prebootm_init ()
 	my_remap_gt_regs_bootm (CFG_GT_REGS, BRIDGE_REG_BASE_BOOTM);
 
 	icache_disable ();
-	invalidate_l1_instruction_cache ();
-	flush_data_cache ();
 	dcache_disable ();
 }
diff --git a/board/esd/cpci750/cpci750.c b/board/esd/cpci750/cpci750.c
index 298aa6a..5ab76c6 100644
--- a/board/esd/cpci750/cpci750.c
+++ b/board/esd/cpci750/cpci750.c
@@ -120,8 +120,6 @@ static char show_config_tab[][15] = {{"PCI0DLL_2     "},  /* 31 */
 				     {"DRAMPLL_NDiv_1"},  /* 01 */
 				     {"DRAMPLL_NDiv_0"}}; /* 00 */
 
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
 extern flash_info_t flash_info[];
 
 /* ------------------------------------------------------------------------- */
@@ -961,8 +959,6 @@ void board_prebootm_init ()
 	my_remap_gt_regs_bootm (CFG_GT_REGS, CFG_DFL_GT_REGS);
 
 	icache_disable ();
-	invalidate_l1_instruction_cache ();
-	flush_data_cache ();
 	dcache_disable ();
 }
 
diff --git a/board/freescale/mpc7448hpc2/mpc7448hpc2.c b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
index b3d83cc..6f74c31 100644
--- a/board/freescale/mpc7448hpc2/mpc7448hpc2.c
+++ b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
@@ -37,8 +37,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
 extern void tsi108_init_f (void);
 
 int display_mem_map (void);
diff --git a/board/prodrive/p3mx/p3mx.c b/board/prodrive/p3mx/p3mx.c
index d54ddaf..69d7c9b 100644
--- a/board/prodrive/p3mx/p3mx.c
+++ b/board/prodrive/p3mx/p3mx.c
@@ -62,8 +62,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DP(x)
 #endif
 
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
 extern flash_info_t flash_info[];
 
 /* ------------------------------------------------------------------------- */
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 5295969..0b14b06 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -236,8 +236,6 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * bios emulation, so turn them off again
 	 */
 	icache_disable();
-	invalidate_l1_instruction_cache();
-	flush_data_cache();
 	dcache_disable();
 #endif
 
diff --git a/cpu/74xx_7xx/cache.S b/cpu/74xx_7xx/cache.S
index 3a745cb..eac4544 100644
--- a/cpu/74xx_7xx/cache.S
+++ b/cpu/74xx_7xx/cache.S
@@ -245,6 +245,10 @@ _GLOBAL(icache_enable)
  * Disable L1 Instruction cache
  */
 _GLOBAL(icache_disable)
+	mflr	r4
+	bl	invalidate_l1_instruction_cache		/* uses r3 */
+	sync
+	mtlr	r4
 	mfspr	r3, HID0
 	li	r5, 0
 	ori	r5, r5, HID0_ICE
diff --git a/cpu/mpc86xx/cache.S b/cpu/mpc86xx/cache.S
index 2e4ea02..80ff688 100644
--- a/cpu/mpc86xx/cache.S
+++ b/cpu/mpc86xx/cache.S
@@ -232,6 +232,10 @@ _GLOBAL(icache_enable)
  * Disable L1 Instruction cache
  */
 _GLOBAL(icache_disable)
+	mflr	r4
+	bl	invalidate_l1_instruction_cache		/* uses r3 */
+	sync
+	mtlr	r4
 	mfspr	r3, HID0
 	li	r5, 0
 	ori	r5, r5, HID0_ICE
-- 
1.5.5.1

  reply	other threads:[~2008-08-12 13:44 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-08-12 13:44 [U-Boot] [WIP][PATCH 00/11] bootm refactoring Kumar Gala
2008-08-12 13:44 ` [U-Boot] [WIP][PATCH 01/11] Update linux bootm to support ePAPR client interface Kumar Gala
2008-08-12 13:44   ` [U-Boot] [WIP][PATCH 02/11] add ability to disable ft_board_setup as part of bootm Kumar Gala
2008-08-12 13:44     ` Kumar Gala [this message]
2008-08-12 13:44       ` [U-Boot] [WIP][PATCH 04/11] bootm: refactor entry point code Kumar Gala
2008-08-12 13:44         ` [U-Boot] [WIP][PATCH 05/11] bootm: refactor ramdisk locating code Kumar Gala
2008-08-12 13:44           ` [U-Boot] [WIP][PATCH 06/11] bootm: refactor fdt locating and relocation code Kumar Gala
2008-08-12 13:44             ` [U-Boot] [WIP][PATCH 07/11] bootm: Set working fdt address as part of the bootm flow Kumar Gala
2008-08-12 13:44               ` [U-Boot] [WIP][PATCH 08/11] bootm: move lmb into the bootm_headers_t structure Kumar Gala
2008-08-12 13:44                 ` [U-Boot] [WIP][PATCH 09/11] bootm: refactor image detection and os load steps Kumar Gala
2008-08-12 13:44                   ` [U-Boot] [WIP][PATCH 10/11] fdt: refactor fdt resize code Kumar Gala
2008-08-12 13:44                     ` [U-Boot] [WIP][PATCH 11/11] fdt: refactor initrd related code Kumar Gala
2008-08-13  5:12                   ` [U-Boot] [WIP][PATCH 09/11] bootm: refactor image detection and os load steps Jerry Van Baren
2008-08-12 20:12 ` [U-Boot] [WIP][PATCH 00/11] bootm refactoring Wolfgang Denk
2008-08-12 20:17   ` Kumar Gala
2008-08-12 23:15     ` Wolfgang Denk
2008-08-13  1:01       ` Kumar Gala
2008-08-13  5:12         ` Jerry Van Baren

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