From: Yinghai Lu <yhlu.kernel@gmail.com>
To: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andrew Morton <akpm@linux-foundation.org>
Cc: linux-kernel@vger.kernel.org, Yinghai Lu <yhlu.kernel@gmail.com>
Subject: [PATCH 9/9] x86: little clean up intel.c/intel_64.c
Date: Sun, 7 Sep 2008 17:58:58 -0700 [thread overview]
Message-ID: <1220835538-18280-9-git-send-email-yhlu.kernel@gmail.com> (raw)
In-Reply-To: <1220835538-18280-1-git-send-email-yhlu.kernel@gmail.com>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
---
arch/x86/kernel/cpu/intel.c | 7 +++----
arch/x86/kernel/cpu/intel_64.c | 8 +++-----
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index bafa3a6..a669895 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -76,7 +76,7 @@ static void __cpuinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
/*
* find out the number of processor cores on the die
*/
-static int __cpuinit num_cpu_cores(struct cpuinfo_x86 *c)
+static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
{
unsigned int eax, ebx, ecx, edx;
@@ -183,7 +183,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
* let's use the legacy cpuid vector 0x1 and 0x4 for topology
* detection.
*/
- c->x86_max_cores = num_cpu_cores(c);
+ c->x86_max_cores = intel_num_cpu_cores(c);
detect_ht(c);
}
@@ -210,9 +210,8 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
if (cpu_has_xmm2)
set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
- if (c->x86 == 15) {
+ if (c->x86 == 15)
set_cpu_cap(c, X86_FEATURE_P4);
- }
if (c->x86 == 6)
set_cpu_cap(c, X86_FEATURE_P3);
if (cpu_has_ds) {
diff --git a/arch/x86/kernel/cpu/intel_64.c b/arch/x86/kernel/cpu/intel_64.c
index 14a2cd9..aef4f28 100644
--- a/arch/x86/kernel/cpu/intel_64.c
+++ b/arch/x86/kernel/cpu/intel_64.c
@@ -71,17 +71,15 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_BTS);
if (!(l1 & (1<<12)))
set_cpu_cap(c, X86_FEATURE_PEBS);
- }
-
-
- if (cpu_has_bts)
ds_init_intel(c);
+ }
if (c->x86 == 15)
c->x86_cache_alignment = c->x86_clflush_size * 2;
if (c->x86 == 6)
set_cpu_cap(c, X86_FEATURE_REP_GOOD);
- set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
+ if (cpu_has_xmm2)
+ set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
detect_extended_topology(c);
if (!cpu_has(c, X86_FEATURE_XTOPOLOGY))
--
1.5.4.5
next prev parent reply other threads:[~2008-09-08 1:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-08 0:58 [PATCH 1/9] x86: cpu make amd.c more like amd_64.c v2 Yinghai Lu
2008-09-08 0:58 ` [PATCH 2/9] x86: remove duplicated force_mwait Yinghai Lu
2008-09-08 0:58 ` [PATCH 3/9] x86: add srat_detect_node for amd64 Yinghai Lu
2008-09-08 0:58 ` [PATCH 4/9] x86: merge header in amd/64.c Yinghai Lu
2008-09-08 0:58 ` [PATCH 5/9] x86: make amd.c have 64bit support code Yinghai Lu
2008-09-08 0:58 ` [PATCH 6/9] x86: make amd_64 have 32 bit code Yinghai Lu
2008-09-08 0:58 ` [PATCH 7/9] x86: make 64 bit to use amd.c Yinghai Lu
2008-09-08 13:33 ` Ingo Molnar
2008-09-08 0:58 ` [PATCH 8/9] x86: lapic address print out like io apic addr Yinghai Lu
2008-09-08 13:45 ` Ingo Molnar
2008-09-08 0:58 ` Yinghai Lu [this message]
2008-09-08 13:46 ` [PATCH 9/9] x86: little clean up intel.c/intel_64.c Ingo Molnar
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