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From: Kumar Gala <galak@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/3] 85xx: Handle eLBC difference w/36-bit physical
Date: Fri, 23 Jan 2009 14:22:13 -0600	[thread overview]
Message-ID: <1232742134-10166-2-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <1232742134-10166-1-git-send-email-galak@kernel.crashing.org>

The eLBC only handles 32-bit physical address in systems with 36-bit
physical.  The previos generation of LBC handled 34-bit physical
address in 36-bit systems.  Added a new CONFIG option to convey
the difference between the LBC and eLBC.

Also added defines for XAM bits used in LBC for the extended 34-bit
support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 include/asm-ppc/fsl_lbc.h   |    8 +++++++-
 include/configs/MPC8536DS.h |    1 +
 include/configs/MPC8572DS.h |    1 +
 3 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h
index e492c62..9fa0b65 100644
--- a/include/asm-ppc/fsl_lbc.h
+++ b/include/asm-ppc/fsl_lbc.h
@@ -28,6 +28,8 @@
 
 #define BR_BA				0xFFFF8000
 #define BR_BA_SHIFT			15
+#define BR_XBA				0x00006000
+#define BR_XBA_SHIFT			13
 #define BR_PS				0x00001800
 #define BR_PS_SHIFT			11
 #define BR_PS_8				0x00000800	/* Port Size 8 bit */
@@ -70,7 +72,7 @@
 #endif
 
 /* Convert an address into the right format for the BR registers */
-#ifdef CONFIG_PHYS_64BIT
+#if defined(CONFIG_PHYS_64BIT) && !defined(CONFIG_FSL_ELBC)
 #define BR_PHYS_ADDR(x)	((unsigned long)((x & 0x0ffff8000ULL) | \
 					 ((x & 0x300000000ULL) >> 19)))
 #else
@@ -90,6 +92,8 @@
 
 #define OR_GPCM_AM			0xFFFF8000
 #define OR_GPCM_AM_SHIFT		15
+#define OR_GPCM_XAM			0x00006000
+#define OR_GPCM_XAM_SHIFT		13
 #define OR_GPCM_BCTLD			0x00001000
 #define OR_GPCM_BCTLD_SHIFT		12
 #define OR_GPCM_CSNT			0x00000800
@@ -132,6 +136,8 @@
 
 #define OR_FCM_AM			0xFFFF8000
 #define OR_FCM_AM_SHIFT				15
+#define OR_FCM_XAM			0x00006000
+#define OR_FCM_XAM_SHIFT		13
 #define OR_FCM_BCTLD			0x00001000
 #define OR_FCM_BCTLD_SHIFT			12
 #define OR_FCM_PGS			0x00000400
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 1209a05..93b7587 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -34,6 +34,7 @@
 #define CONFIG_MPC8536		1
 #define CONFIG_MPC8536DS	1
 
+#define CONFIG_FSL_ELBC		1	/* Has Enhanced localbus controller */
 #define CONFIG_PCI		1	/* Enable PCI/PCIE */
 #define CONFIG_PCI1		1	/* Enable PCI controller 1 */
 #define CONFIG_PCIE1		1	/* PCIE controler 1 (slot 1) */
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 8e4eb10..b060d6e 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -36,6 +36,7 @@
 #define CONFIG_MP		1	/* support multiple processors */
 #define CONFIG_NUM_CPUS		2	/* Number of CPUs in the system */
 
+#define CONFIG_FSL_ELBC		1	/* Has Enhanced localbus controller */
 #define CONFIG_PCI		1	/* Enable PCI/PCIE */
 #define CONFIG_PCIE1		1	/* PCIE controler 1 (slot 1) */
 #define CONFIG_PCIE2		1	/* PCIE controler 2 (slot 2) */
-- 
1.5.6.6

  reply	other threads:[~2009-01-23 20:22 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-01-23 20:22 [U-Boot] [PATCH 1/3] 85xx: Use BR_ADDR macro for NAND chipselects Kumar Gala
2009-01-23 20:22 ` Kumar Gala [this message]
2009-01-23 20:22   ` [U-Boot] [PATCH 3/3] 85xx: Add a 36-bit physical configuration for MPC8572DS Kumar Gala
2009-01-23 20:29     ` Kumar Gala
2009-02-10  0:40       ` Andy Fleming
2009-02-10  3:04         ` Kumar Gala
2009-02-10  0:40   ` [U-Boot] [PATCH 2/3] 85xx: Handle eLBC difference w/36-bit physical Andy Fleming
2009-02-10  0:39 ` [U-Boot] [PATCH 1/3] 85xx: Use BR_ADDR macro for NAND chipselects Andy Fleming

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