From: Michael Ellerman <michael@ellerman.id.au>
To: Jeremy Kerr <jk@ozlabs.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH] powerpc: Add write barrier before enabling DTL flags
Date: Wed, 25 Mar 2009 11:44:42 +1100 [thread overview]
Message-ID: <1237941882.6462.64.camel@localhost> (raw)
In-Reply-To: <200903241659.55302.jk@ozlabs.org>
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On Tue, 2009-03-24 at 16:59 +1100, Jeremy Kerr wrote:
> Michael,
>
> > Wouldn't this still be a problem on a UP kernel?
>
> I don't believe so - stores should be ordered with respect to the
> current CPU, and in the UP case we still get a barrier().
But what if the CPU decides to do the store to the enable_mask before
the stores to the other fields?
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
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prev parent reply other threads:[~2009-03-25 0:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <<1236830152.729279.468331899806.3.gpush@pingu>
2009-03-24 2:40 ` [PATCH v2] powerpc: Add virtual processor dispatch trace log Jeremy Kerr
2009-03-24 2:55 ` [PATCH] powerpc: Add write barrier before enabling DTL flags Jeremy Kerr
2009-03-24 5:53 ` Michael Ellerman
2009-03-24 5:59 ` Jeremy Kerr
2009-03-25 0:44 ` Michael Ellerman [this message]
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