Re: [PATCH 2/3 -tip] perf_counter tools: Add support to set of multiple events in one shot

[Jaswinder Singh Rajput <jaswinder@kernel.org>]

On Tue, 2009-06-30 at 11:57 +0200, Ingo Molnar wrote:
> * Jaswinder Singh Rajput <jaswinder@kernel.org> wrote:
> 
> > On Mon, 2009-06-29 at 05:57 +0200, Ingo Molnar wrote:
> > 
> > > The above patterns i suggested _already cover_ 'multiple events'.
> > > 
> > > We might define further aliases like:
> > > 
> > > 	all := "*"
> > >         all-sw := "sw-*"
> > > 
> > > but it should all be in terms of patterns and regular 
> > > expressions, not via some hardcoded special-case thing as your 
> > > posted patches did.
> > > 
> > 
> > It seems to me very confusing and needs lot of book-keeping and 
> > need to rewrite whole tools/perf/util/parse-events.c because :
> > 
> > * means all perf_event_types :
> > 	PERF_TYPE_HARDWARE,
> >         PERF_TYPE_SOFTWARE,
> >         PERF_TYPE_TRACEPOINT,
> >         PERF_TYPE_HW_CACHE,
> >         PERF_TYPE_RAW
> > 
> > hw-* means all hardware events :
> > 	PERF_TYPE_HARDWARE,
> >         PERF_TYPE_HW_CACHE,
> >         PERF_TYPE_RAW
> > 
> > sw-* means all software events :
> >         PERF_TYPE_SOFTWARE,
> >         PERF_TYPE_TRACEPOINT
> > 
> > *cache* means all cache based events :
> > 	PERF_COUNT_CACHE_REFERENCES, 	/* Generalized H/W */
> > 	PERF_COUNT_CACHE_MISSES,	/* Generalized H/W */
> >         PERF_TYPE_HW_CACHE,		/* Generalized Cache */
> > 
> > *write* means all write based events :
> > 	(L1D,       WRITE,          ACCESS),
> > 	(L1D,       WRITE,          MISS),
> > 	(LL,        WRITE,          ACCESS),
> > 	(LL,        WRITE,          MISS),
> > 	(DTLB,      WRITE,          ACCESS),
> > 	(DTLB,      WRITE,          MISS)
> > 
> > Please let me know why it looks complex to me, is it really 
> > complex or I am going in wrong direction.
> 
> It would certainly need some reorganization of the code but the end 
> result would be more flexible and other places could use it too, for 
> example:
> 
> 	perf test -e hw-*
> 
> would test all (known) hardware counters.
> 

Its true.

Can you please verify that the assumptions I made above are correct.

Thanks,
--
JSR