From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: kvm-ppc@vger.kernel.org
Subject: Re: [PATCH 08/23] Add interrupt handling code
Date: Wed, 08 Jul 2009 07:54:57 +0000 [thread overview]
Message-ID: <1247039697.6066.164.camel@pasglop> (raw)
In-Reply-To: <1246976262-4826-9-git-send-email-agraf@suse.de>
On Wed, 2009-07-08 at 09:27 +0200, Alexander Graf wrote:
> Hum, something like a generic interrupt hooking mechanism? Sounds
> cool :-). But not all interrupt handlers use generic code, so we'd
> have to duplicate some bits quite some times.
Right, some of them are subtly different. ..
One cool thing however is that they all have about 0x100 bytes of space
and only use a portion of that so we should be able to do something
about it... maybe having 2 variants of the prolog, with and without the
test to jump to KVM for example and "replace" them when KVM is loaded.
I need to think about it a bit more. One thing we may want to do is
instead to set SPRG3 bit 0, instead, is to set a bit in the PACA,
that would make things a lot easier. We could run through the base
prolog and just add three instructions (that can be noped out easily) to
load that flag, test it and branch out of line to a special if set.
In the standard prolog, we can clobber r10, r11 and r12 right after
EXCEPTION_PROLOG_1 and we should be able to clobber CR0 as well since we
just saved CR into r9, so we could probably do something like lbz the
"KVM" flag into r11 before loading PACAKBASE into r12, then compare it
to 0 and branch conditional after loading PACAKMSR into r10 or something
like that (to keep a gap between load and use to avoid back to back
here).
In fact, more fun: You could hack PACAKBASE and PACAMSR :-) But that's a
bit harder to get the offsets right. Would probably work to. Make it
point to a page where the handlers are at the right offset (we could
make them all be at 0x0f0 or so from the base of the exception easily
instead of right after so you don't have to do black magic to find where
to put them or you could just fill the whole 0x100 bytes with copies).
That way, depending on whether you are in KVM or not on that CPU, the
existing code would branch to your secondary handlers with the MSR of
your choice (typically still in real mode) without adding a conditional
branch to the exception entry code.
We can carve out a page down there in the RMA for use by KVM easily, in
fact we probably have some unused space already.
Cheers,
Ben.
next prev parent reply other threads:[~2009-07-08 7:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-07 14:17 [PATCH 08/23] Add interrupt handling code Alexander Graf
2009-07-08 5:24 ` Benjamin Herrenschmidt
2009-07-08 7:27 ` Alexander Graf
2009-07-08 7:54 ` Benjamin Herrenschmidt [this message]
2009-07-16 13:30 ` Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1247039697.6066.164.camel@pasglop \
--to=benh@kernel.crashing.org \
--cc=kvm-ppc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.