From: sanguru <santoshguru@yahoo.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] Enabling Cache in MPC5200
Date: Wed, 5 Sep 2007 05:25:24 -0700 (PDT) [thread overview]
Message-ID: <12496873.post@talk.nabble.com> (raw)
In-Reply-To: <m21wdd9ybx.fsf@ohwell.denx.de>
Thanks Detlev for the reply.
Its a "standard lite5200" from Freescale.
The cache gets enabled in some boards and not in some.
2 out of 4 boards we have, has this issue.
I will check my RAM initialisation.
Any more pointers will be helpful.
-San
Detlev Zundel wrote:
>
> Hi San,
>
>> I am using a LITE5200 evaluation board, and am not able to enable the
>> cache.
>> The execution hangs in these calls.
>> void EnableInstCache(void)
>> {
>
> [...]
>
>> }
>>
>> void EnableDataCache(void)
>> {
>
> [...]
>
>> }
>> What could be the problem?
>
> It might be one of our favourites, i.e. wrong ram initialization.
> When enabling the caches, the CPU generates burst accesses for the
> first time. It is pretty common (on this mailing list) that not quite
> correctly initialized RAM works for single beat but fails for bursts.
> So my advice would be to check the RAM init.
>
> Is is really a standard lite5200 board that you use?
>
> Cheers
> Detlev
>
> --
> The best way to predict the future is to invent it.
> -- Alan Kay
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> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
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View this message in context: http://www.nabble.com/Enabling-Cache-in-MPC5200-tf4376209.html#a12496873
Sent from the Uboot - Users mailing list archive at Nabble.com.
prev parent reply other threads:[~2007-09-05 12:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-04 8:11 [U-Boot-Users] Enabling Cache in MPC5200 santoshguru at yahoo.com
2007-09-05 10:54 ` Detlev Zundel
2007-09-05 12:25 ` sanguru [this message]
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