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Sun, 15 Mar 2026 09:33:33 -0700 (PDT) X-Received: by 2002:a05:6a21:4d91:b0:395:3b57:9541 with SMTP id adf61e73a8af0-398eaf95803mr8843113637.2.1773592412565; Sun, 15 Mar 2026 09:33:32 -0700 (PDT) Received: from [192.168.29.116] ([49.37.148.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82a13a2f112sm10557482b3a.12.2026.03.15.09.33.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 15 Mar 2026 09:33:32 -0700 (PDT) Message-ID: <124f5a78-a3be-4906-bea0-a82bb74b2f96@oss.qualcomm.com> Date: Sun, 15 Mar 2026 22:03:16 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/15] firmware: qcom: Add a generic PAS service To: Sumit Garg , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg References: <20260312062756.694390-1-sumit.garg@kernel.org> <20260312062756.694390-3-sumit.garg@kernel.org> Content-Language: en-US From: Harshal Dev In-Reply-To: <20260312062756.694390-3-sumit.garg@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=BJ2+bVQG c=1 sm=1 tr=0 ts=69b6df5e cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=lxqEWys9kfb/iFo5xnmj6A==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=B9m6UvTZno2CEb395rQA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-GUID: 9tuy9-7r4KOI9E9lHZ5t3AFhMsHIZDNW X-Proofpoint-ORIG-GUID: 9tuy9-7r4KOI9E9lHZ5t3AFhMsHIZDNW X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE1MDEzMCBTYWx0ZWRfX7e/St3Aa6Ydi uKZfFNB3ucBiTBOR9kUxTgBcxrJYJAc8hqAssa8zThEY2GDUKiY7wJ03op+qCudU8C8IQ2WqmUp ql/U8vG8x/H+kGWIiGg9z5Min7FgARtAgL5Adv+3XSfA7UbMo3fwE68iR5d1JTsNtB0DZPoW5qH thhzABRCBR6HhrvA1N1tG2z7QcgFdWz9BqtdyyVvSzRMgt3/Y5EvUXPZKRPazE3KOV0OHDD/Yre XIX9huvGcpy7ok0iJbWcLCnBa2UMt141AO7k4kjkdqLuRf+XdP602EFIT3h7Ux9AdX20OfY1tyR uyDCgJ6rp7pOTdoUuDMzwJj3VrqaJHAsn7C89Qc2Je/WsXvET4UQPmk16PjGeYw1SdkM+zFJr1/ RfjvsmrIXsz9s4QkQLypqM0C5A+/FiNY48XsbZCXOdkv05G6hPrSgjF8LF/WiNRnPM0agbSawHX rcgqkGjltzDj+7Dkh9Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-15_06,2026-03-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 lowpriorityscore=0 adultscore=0 priorityscore=1501 phishscore=0 bulkscore=0 impostorscore=0 spamscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603150130 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260315_093335_223395_35C7D952 X-CRM114-Status: GOOD ( 39.52 ) X-BeenThere: ath12k@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "ath12k" Errors-To: ath12k-bounces+ath12k=archiver.kernel.org@lists.infradead.org On 3/12/2026 11:57 AM, Sumit Garg wrote: > From: Sumit Garg > > Qcom platforms has the legacy of using non-standard SCM calls > splintered over the various kernel drivers. These SCM calls aren't > compliant with the standard SMC calling conventions which is a > prerequisite to enable migration to the FF-A specifications from Arm. > > OP-TEE as an alternative trusted OS to Qualcomm TEE (QTEE) can't > support these non-standard SCM calls. And even for newer architectures > with S-EL2 and Hafnium support, QTEE won't be able to support SCM > calls either with FF-A requirements coming in. And with both OP-TEE > and QTEE drivers well integrated in the TEE subsystem, it makes further > sense to reuse the TEE bus client drivers infrastructure. > > The added benefit of TEE bus infrastructure is that there is support > for discoverable/enumerable services. With that client drivers don't > have to manually invoke a special SCM call to know the service status. > > So enable the generic Peripheral Authentication Service (PAS) provided > by the firmware. It acts as the common layer with different TZ > backends plugged in whether it's an SCM implementation or a proper > TEE bus based PAS service implementation. > > Signed-off-by: Sumit Garg > --- > drivers/firmware/qcom/Kconfig | 8 + > drivers/firmware/qcom/Makefile | 1 + > drivers/firmware/qcom/qcom_pas.c | 298 +++++++++++++++++++++++++ > drivers/firmware/qcom/qcom_pas.h | 53 +++++ > include/linux/firmware/qcom/qcom_pas.h | 41 ++++ > 5 files changed, 401 insertions(+) > create mode 100644 drivers/firmware/qcom/qcom_pas.c > create mode 100644 drivers/firmware/qcom/qcom_pas.h > create mode 100644 include/linux/firmware/qcom/qcom_pas.h > > diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig > index b477d54b495a..8653639d06db 100644 > --- a/drivers/firmware/qcom/Kconfig > +++ b/drivers/firmware/qcom/Kconfig > @@ -6,6 +6,14 @@ > > menu "Qualcomm firmware drivers" > > +config QCOM_PAS > + tristate > + help > + Enable the generic Peripheral Authentication Service (PAS) provided > + by the firmware. It acts as the common layer with different TZ > + backends plugged in whether it's an SCM implementation or a proper > + TEE bus based PAS service implementation. > + > config QCOM_SCM > select QCOM_TZMEM > tristate > diff --git a/drivers/firmware/qcom/Makefile b/drivers/firmware/qcom/Makefile > index 0be40a1abc13..dc5ab45f906a 100644 > --- a/drivers/firmware/qcom/Makefile > +++ b/drivers/firmware/qcom/Makefile > @@ -8,3 +8,4 @@ qcom-scm-objs += qcom_scm.o qcom_scm-smc.o qcom_scm-legacy.o > obj-$(CONFIG_QCOM_TZMEM) += qcom_tzmem.o > obj-$(CONFIG_QCOM_QSEECOM) += qcom_qseecom.o > obj-$(CONFIG_QCOM_QSEECOM_UEFISECAPP) += qcom_qseecom_uefisecapp.o > +obj-$(CONFIG_QCOM_PAS) += qcom_pas.o > diff --git a/drivers/firmware/qcom/qcom_pas.c b/drivers/firmware/qcom/qcom_pas.c > new file mode 100644 > index 000000000000..beb1bae55546 > --- /dev/null > +++ b/drivers/firmware/qcom/qcom_pas.c > @@ -0,0 +1,298 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#include > +#include > +#include > +#include > + > +#include "qcom_pas.h" > + > +struct qcom_pas_ops *ops_ptr; > + > +/** > + * devm_qcom_pas_context_alloc() - Allocate peripheral authentication service > + * context for a given peripheral > + * > + * PAS context is device-resource managed, so the caller does not need > + * to worry about freeing the context memory. > + * > + * @dev: PAS firmware device > + * @pas_id: peripheral authentication service id > + * @mem_phys: Subsystem reserve memory start address > + * @mem_size: Subsystem reserve memory size > + * > + * Return: The new PAS context, or ERR_PTR() on failure. > + */ > +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, > + u32 pas_id, > + phys_addr_t mem_phys, > + size_t mem_size) > +{ > + struct qcom_pas_context *ctx; > + > + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); > + if (!ctx) > + return ERR_PTR(-ENOMEM); > + > + ctx->dev = dev; > + ctx->pas_id = pas_id; > + ctx->mem_phys = mem_phys; > + ctx->mem_size = mem_size; > + > + return ctx; > +} > +EXPORT_SYMBOL_GPL(devm_qcom_pas_context_alloc); > + > +/** > + * qcom_pas_init_image() - Initialize peripheral authentication service state > + * machine for a given peripheral, using the metadata > + * @pas_id: peripheral authentication service id > + * @metadata: pointer to memory containing ELF header, program header table > + * and optional blob of data used for authenticating the metadata > + * and the rest of the firmware > + * @size: size of the metadata > + * @ctx: optional pas context > + * > + * Return: 0 on success. > + * > + * Upon successful return, the PAS metadata context (@ctx) will be used to > + * track the metadata allocation, this needs to be released by invoking > + * qcom_pas_metadata_release() by the caller. > + */ > +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, > + struct qcom_pas_context *ctx) > +{ I think we should check for !ctx everywhere the way we are doing in qcom_pas_metadata_release(). !ctx->ptr may be checked conditionally based on whether the underlying implementation uses it. > + if (ops_ptr) > + return ops_ptr->init_image(ops_ptr->dev, pas_id, > + metadata, size, ctx); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_init_image); > + > +/** > + * qcom_pas_metadata_release() - release metadata context > + * @ctx: pas context > + */ > +void qcom_pas_metadata_release(struct qcom_pas_context *ctx) > +{ > + if (!ctx || !ctx->ptr) > + return; > + > + if (ops_ptr) > + ops_ptr->metadata_release(ops_ptr->dev, ctx); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_metadata_release); > + > +/** > + * qcom_pas_mem_setup() - Prepare the memory related to a given peripheral > + * for firmware loading > + * @pas_id: peripheral authentication service id > + * @addr: start address of memory area to prepare > + * @size: size of the memory area to prepare > + * > + * Return: 0 on success. > + */ > +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) > +{ > + if (ops_ptr) > + return ops_ptr->mem_setup(ops_ptr->dev, pas_id, addr, size); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_mem_setup); > + > +/** > + * qcom_pas_get_rsc_table() - Retrieve the resource table in passed output buffer > + * for a given peripheral. > + * > + * Qualcomm remote processor may rely on both static and dynamic resources for > + * its functionality. Static resources typically refer to memory-mapped > + * addresses required by the subsystem and are often embedded within the > + * firmware binary and dynamic resources, such as shared memory in DDR etc., > + * are determined at runtime during the boot process. > + * > + * On Qualcomm Technologies devices, it's possible that static resources are > + * not embedded in the firmware binary and instead are provided by TrustZone. > + * However, dynamic resources are always expected to come from TrustZone. This > + * indicates that for Qualcomm devices, all resources (static and dynamic) will > + * be provided by TrustZone PAS service. > + * > + * If the remote processor firmware binary does contain static resources, they > + * should be passed in input_rt. These will be forwarded to TrustZone for > + * authentication. TrustZone will then append the dynamic resources and return > + * the complete resource table in output_rt_tzm. > + * > + * If the remote processor firmware binary does not include a resource table, > + * the caller of this function should set input_rt as NULL and input_rt_size > + * as zero respectively. > + * > + * More about documentation on resource table data structures can be found in > + * include/linux/remoteproc.h > + * > + * @ctx: PAS context > + * @pas_id: peripheral authentication service id > + * @input_rt: resource table buffer which is present in firmware binary > + * @input_rt_size: size of the resource table present in firmware binary > + * @output_rt_size: TrustZone expects caller should pass worst case size for > + * the output_rt_tzm. > + * > + * Return: > + * On success, returns a pointer to the allocated buffer containing the final > + * resource table and output_rt_size will have actual resource table size from > + * TrustZone. The caller is responsible for freeing the buffer. On failure, > + * returns ERR_PTR(-errno). > + */ > +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, > + void *input_rt, > + size_t input_rt_size, > + size_t *output_rt_size) > +{ Check for !ctx here as well. > + if (ops_ptr) > + return ops_ptr->get_rsc_table(ops_ptr->dev, ctx, input_rt, > + input_rt_size, output_rt_size); > + > + return ERR_PTR(-ENODEV); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_get_rsc_table); > + > +/** > + * qcom_pas_auth_and_reset() - Authenticate the given peripheral firmware > + * and reset the remote processor > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_auth_and_reset(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->auth_and_reset(ops_ptr->dev, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_auth_and_reset); > + > +/** > + * qcom_pas_prepare_and_auth_reset() - Prepare, authenticate, and reset the > + * remote processor > + * > + * @ctx: Context saved during call to qcom_scm_pas_context_init() > + * > + * This function performs the necessary steps to prepare a PAS subsystem, > + * authenticate it using the provided metadata, and initiate a reset sequence. > + * > + * It should be used when Linux is in control setting up the IOMMU hardware > + * for remote subsystem during secure firmware loading processes. The > + * preparation step sets up a shmbridge over the firmware memory before > + * TrustZone accesses the firmware memory region for authentication. The > + * authentication step verifies the integrity and authenticity of the firmware > + * or configuration using secure metadata. Finally, the reset step ensures the > + * subsystem starts in a clean and sane state. > + * > + * Return: 0 on success, negative errno on failure. > + */ > +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx) > +{ Same here. > + if (ops_ptr) > + return ops_ptr->prepare_and_auth_reset(ops_ptr->dev, ctx); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_prepare_and_auth_reset); > + > +/** > + * qcom_pas_set_remote_state() - Set the remote processor state > + * @state: peripheral state > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_set_remote_state(u32 state, u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->set_remote_state(ops_ptr->dev, state, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_set_remote_state); > + > +/** > + * qcom_pas_shutdown() - Shut down the remote processor > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_shutdown(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->shutdown(ops_ptr->dev, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_shutdown); > + > +/** > + * qcom_pas_supported() - Check if the peripheral authentication service is > + * available for the given peripheral > + * @pas_id: peripheral authentication service id > + * > + * Return: true if PAS is supported for this peripheral, otherwise false. > + */ > +bool qcom_pas_supported(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->supported(ops_ptr->dev, pas_id); > + > + return false; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_supported); > + > +/** > + * qcom_pas_is_available() - Check for PAS service > + * > + * Return: true on success. > + */ > +bool qcom_pas_is_available(void) > +{ > + /* > + * The barrier for ops_ptr is intended to synchronize the data stores > + * for the ops data structure when client drivers are in parallel > + * checking for PAS service availability. > + * > + * Once the PAS backend becomes available, it is allowed for multiple > + * threads to enter TZ for parallel bringup of co-processors during > + * boot. > + */ > + return !!smp_load_acquire(&ops_ptr); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_is_available); > + > +/** > + * qcom_pas_ops_register() - Register PAS service ops > + * @ops: PAS service ops pointer > + */ > +void qcom_pas_ops_register(struct qcom_pas_ops *ops) > +{ > + if (!qcom_pas_is_available()) > + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ > + smp_store_release(&ops_ptr, ops); > + else > + pr_err("qcom_pas: ops already registered\n"); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_ops_register); > + > +/** > + * qcom_pas_ops_unregister() - Unregister PAS service ops > + */ > +void qcom_pas_ops_unregister(void) > +{ > + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ > + smp_store_release(&ops_ptr, NULL); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_ops_unregister); > + > +MODULE_LICENSE("GPL"); > +MODULE_DESCRIPTION("Qualcomm common TZ PAS driver"); > diff --git a/drivers/firmware/qcom/qcom_pas.h b/drivers/firmware/qcom/qcom_pas.h > new file mode 100644 > index 000000000000..4ebed22178f8 > --- /dev/null > +++ b/drivers/firmware/qcom/qcom_pas.h > @@ -0,0 +1,53 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __QCOM_PAS_INT_H > +#define __QCOM_PAS_INT_H > + > +struct device; > + > +/** > + * struct qcom_pas_ops - Qcom Peripheral Authentication Service (PAS) ops > + * @drv_name: PAS driver name. > + * @dev: PAS device pointer. > + * @supported: Peripheral supported callback. > + * @init_image: Peripheral image initialization callback. > + * @mem_setup: Peripheral memory setup callback. > + * @get_rsc_table: Peripheral get resource table callback. > + * @prepare_and_auth_reset: Peripheral prepare firmware authentication and > + * reset callback. > + * @auth_and_reset: Peripheral firmware authentication and reset > + * callback. > + * @set_remote_state: Peripheral set remote state callback. > + * @shutdown: Peripheral shutdown callback. > + * @metadata_release: Image metadata release callback. > + */ > +struct qcom_pas_ops { > + const char *drv_name; > + struct device *dev; > + bool (*supported)(struct device *dev, u32 pas_id); > + int (*init_image)(struct device *dev, u32 pas_id, > + const void *metadata, size_t size, > + struct qcom_pas_context *ctx); > + int (*mem_setup)(struct device *dev, u32 pas_id, > + phys_addr_t addr, phys_addr_t size); > + void *(*get_rsc_table)(struct device *dev, > + struct qcom_pas_context *ctx, > + void *input_rt, > + size_t input_rt_size, > + size_t *output_rt_size); > + int (*prepare_and_auth_reset)(struct device *dev, > + struct qcom_pas_context *ctx); > + int (*auth_and_reset)(struct device *dev, u32 pas_id); > + int (*set_remote_state)(struct device *dev, u32 state, u32 pas_id); > + int (*shutdown)(struct device *dev, u32 pas_id); > + void (*metadata_release)(struct device *dev, > + struct qcom_pas_context *ctx); > +}; > + > +void qcom_pas_ops_register(struct qcom_pas_ops *ops); > +void qcom_pas_ops_unregister(void); > + > +#endif /* __QCOM_PAS_INT_H */ > diff --git a/include/linux/firmware/qcom/qcom_pas.h b/include/linux/firmware/qcom/qcom_pas.h > new file mode 100644 > index 000000000000..ef7328ecfa47 > --- /dev/null > +++ b/include/linux/firmware/qcom/qcom_pas.h > @@ -0,0 +1,41 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __QCOM_PAS_H > +#define __QCOM_PAS_H > + > +#include > +#include > + > +struct qcom_pas_context { > + struct device *dev; > + u32 pas_id; > + phys_addr_t mem_phys; > + size_t mem_size; > + void *ptr; > + dma_addr_t phys; > + ssize_t size; > + bool use_tzmem; > +}; > + > +bool qcom_pas_is_available(void); > +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, > + u32 pas_id, > + phys_addr_t mem_phys, > + size_t mem_size); > +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, > + struct qcom_pas_context *ctx); > +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, > + void *input_rt, size_t input_rt_size, > + size_t *output_rt_size); > +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size); > +int qcom_pas_auth_and_reset(u32 pas_id); > +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx); > +int qcom_pas_set_remote_state(u32 state, u32 pas_id); > +int qcom_pas_shutdown(u32 pas_id); > +bool qcom_pas_supported(u32 pas_id); > +void qcom_pas_metadata_release(struct qcom_pas_context *ctx); > + > +#endif /* __QCOM_PAS_H */ Regards, Harshal From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.trustedfirmware.org (lists.trustedfirmware.org [18.214.241.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C47AFF3026D for ; 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NEURAL_HAM(-0.00)[-1.000]; ALIAS_RESOLVED(0.00)[]; TAGGED_RCPT(0.00)[dt,netdev]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_IN_DNSWL_NONE(0.00)[209.85.210.200:received] X-Rspamd-Server: lists.trustedfirmware.org X-Rspamd-Queue-Id: 9D4D243229 X-Spamd-Bar: ---- Message-ID-Hash: TCCXYCA55DQ7QDSKZXH5FUUN5OXHAT3Z X-Message-ID-Hash: TCCXYCA55DQ7QDSKZXH5FUUN5OXHAT3Z X-MailFrom: harshal.dev@oss.qualcomm.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-op-tee.lists.trustedfirmware.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg X-Mailman-Version: 3.3.5 Precedence: list List-Id: Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Harshal Dev via OP-TEE Reply-To: Harshal Dev On 3/12/2026 11:57 AM, Sumit Garg wrote: > From: Sumit Garg > > Qcom platforms has the legacy of using non-standard SCM calls > splintered over the various kernel drivers. These SCM calls aren't > compliant with the standard SMC calling conventions which is a > prerequisite to enable migration to the FF-A specifications from Arm. > > OP-TEE as an alternative trusted OS to Qualcomm TEE (QTEE) can't > support these non-standard SCM calls. And even for newer architectures > with S-EL2 and Hafnium support, QTEE won't be able to support SCM > calls either with FF-A requirements coming in. And with both OP-TEE > and QTEE drivers well integrated in the TEE subsystem, it makes further > sense to reuse the TEE bus client drivers infrastructure. > > The added benefit of TEE bus infrastructure is that there is support > for discoverable/enumerable services. With that client drivers don't > have to manually invoke a special SCM call to know the service status. > > So enable the generic Peripheral Authentication Service (PAS) provided > by the firmware. It acts as the common layer with different TZ > backends plugged in whether it's an SCM implementation or a proper > TEE bus based PAS service implementation. > > Signed-off-by: Sumit Garg > --- > drivers/firmware/qcom/Kconfig | 8 + > drivers/firmware/qcom/Makefile | 1 + > drivers/firmware/qcom/qcom_pas.c | 298 +++++++++++++++++++++++++ > drivers/firmware/qcom/qcom_pas.h | 53 +++++ > include/linux/firmware/qcom/qcom_pas.h | 41 ++++ > 5 files changed, 401 insertions(+) > create mode 100644 drivers/firmware/qcom/qcom_pas.c > create mode 100644 drivers/firmware/qcom/qcom_pas.h > create mode 100644 include/linux/firmware/qcom/qcom_pas.h > > diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig > index b477d54b495a..8653639d06db 100644 > --- a/drivers/firmware/qcom/Kconfig > +++ b/drivers/firmware/qcom/Kconfig > @@ -6,6 +6,14 @@ > > menu "Qualcomm firmware drivers" > > +config QCOM_PAS > + tristate > + help > + Enable the generic Peripheral Authentication Service (PAS) provided > + by the firmware. It acts as the common layer with different TZ > + backends plugged in whether it's an SCM implementation or a proper > + TEE bus based PAS service implementation. > + > config QCOM_SCM > select QCOM_TZMEM > tristate > diff --git a/drivers/firmware/qcom/Makefile b/drivers/firmware/qcom/Makefile > index 0be40a1abc13..dc5ab45f906a 100644 > --- a/drivers/firmware/qcom/Makefile > +++ b/drivers/firmware/qcom/Makefile > @@ -8,3 +8,4 @@ qcom-scm-objs += qcom_scm.o qcom_scm-smc.o qcom_scm-legacy.o > obj-$(CONFIG_QCOM_TZMEM) += qcom_tzmem.o > obj-$(CONFIG_QCOM_QSEECOM) += qcom_qseecom.o > obj-$(CONFIG_QCOM_QSEECOM_UEFISECAPP) += qcom_qseecom_uefisecapp.o > +obj-$(CONFIG_QCOM_PAS) += qcom_pas.o > diff --git a/drivers/firmware/qcom/qcom_pas.c b/drivers/firmware/qcom/qcom_pas.c > new file mode 100644 > index 000000000000..beb1bae55546 > --- /dev/null > +++ b/drivers/firmware/qcom/qcom_pas.c > @@ -0,0 +1,298 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#include > +#include > +#include > +#include > + > +#include "qcom_pas.h" > + > +struct qcom_pas_ops *ops_ptr; > + > +/** > + * devm_qcom_pas_context_alloc() - Allocate peripheral authentication service > + * context for a given peripheral > + * > + * PAS context is device-resource managed, so the caller does not need > + * to worry about freeing the context memory. > + * > + * @dev: PAS firmware device > + * @pas_id: peripheral authentication service id > + * @mem_phys: Subsystem reserve memory start address > + * @mem_size: Subsystem reserve memory size > + * > + * Return: The new PAS context, or ERR_PTR() on failure. > + */ > +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, > + u32 pas_id, > + phys_addr_t mem_phys, > + size_t mem_size) > +{ > + struct qcom_pas_context *ctx; > + > + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); > + if (!ctx) > + return ERR_PTR(-ENOMEM); > + > + ctx->dev = dev; > + ctx->pas_id = pas_id; > + ctx->mem_phys = mem_phys; > + ctx->mem_size = mem_size; > + > + return ctx; > +} > +EXPORT_SYMBOL_GPL(devm_qcom_pas_context_alloc); > + > +/** > + * qcom_pas_init_image() - Initialize peripheral authentication service state > + * machine for a given peripheral, using the metadata > + * @pas_id: peripheral authentication service id > + * @metadata: pointer to memory containing ELF header, program header table > + * and optional blob of data used for authenticating the metadata > + * and the rest of the firmware > + * @size: size of the metadata > + * @ctx: optional pas context > + * > + * Return: 0 on success. > + * > + * Upon successful return, the PAS metadata context (@ctx) will be used to > + * track the metadata allocation, this needs to be released by invoking > + * qcom_pas_metadata_release() by the caller. > + */ > +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, > + struct qcom_pas_context *ctx) > +{ I think we should check for !ctx everywhere the way we are doing in qcom_pas_metadata_release(). !ctx->ptr may be checked conditionally based on whether the underlying implementation uses it. > + if (ops_ptr) > + return ops_ptr->init_image(ops_ptr->dev, pas_id, > + metadata, size, ctx); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_init_image); > + > +/** > + * qcom_pas_metadata_release() - release metadata context > + * @ctx: pas context > + */ > +void qcom_pas_metadata_release(struct qcom_pas_context *ctx) > +{ > + if (!ctx || !ctx->ptr) > + return; > + > + if (ops_ptr) > + ops_ptr->metadata_release(ops_ptr->dev, ctx); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_metadata_release); > + > +/** > + * qcom_pas_mem_setup() - Prepare the memory related to a given peripheral > + * for firmware loading > + * @pas_id: peripheral authentication service id > + * @addr: start address of memory area to prepare > + * @size: size of the memory area to prepare > + * > + * Return: 0 on success. > + */ > +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) > +{ > + if (ops_ptr) > + return ops_ptr->mem_setup(ops_ptr->dev, pas_id, addr, size); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_mem_setup); > + > +/** > + * qcom_pas_get_rsc_table() - Retrieve the resource table in passed output buffer > + * for a given peripheral. > + * > + * Qualcomm remote processor may rely on both static and dynamic resources for > + * its functionality. Static resources typically refer to memory-mapped > + * addresses required by the subsystem and are often embedded within the > + * firmware binary and dynamic resources, such as shared memory in DDR etc., > + * are determined at runtime during the boot process. > + * > + * On Qualcomm Technologies devices, it's possible that static resources are > + * not embedded in the firmware binary and instead are provided by TrustZone. > + * However, dynamic resources are always expected to come from TrustZone. This > + * indicates that for Qualcomm devices, all resources (static and dynamic) will > + * be provided by TrustZone PAS service. > + * > + * If the remote processor firmware binary does contain static resources, they > + * should be passed in input_rt. These will be forwarded to TrustZone for > + * authentication. TrustZone will then append the dynamic resources and return > + * the complete resource table in output_rt_tzm. > + * > + * If the remote processor firmware binary does not include a resource table, > + * the caller of this function should set input_rt as NULL and input_rt_size > + * as zero respectively. > + * > + * More about documentation on resource table data structures can be found in > + * include/linux/remoteproc.h > + * > + * @ctx: PAS context > + * @pas_id: peripheral authentication service id > + * @input_rt: resource table buffer which is present in firmware binary > + * @input_rt_size: size of the resource table present in firmware binary > + * @output_rt_size: TrustZone expects caller should pass worst case size for > + * the output_rt_tzm. > + * > + * Return: > + * On success, returns a pointer to the allocated buffer containing the final > + * resource table and output_rt_size will have actual resource table size from > + * TrustZone. The caller is responsible for freeing the buffer. On failure, > + * returns ERR_PTR(-errno). > + */ > +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, > + void *input_rt, > + size_t input_rt_size, > + size_t *output_rt_size) > +{ Check for !ctx here as well. > + if (ops_ptr) > + return ops_ptr->get_rsc_table(ops_ptr->dev, ctx, input_rt, > + input_rt_size, output_rt_size); > + > + return ERR_PTR(-ENODEV); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_get_rsc_table); > + > +/** > + * qcom_pas_auth_and_reset() - Authenticate the given peripheral firmware > + * and reset the remote processor > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_auth_and_reset(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->auth_and_reset(ops_ptr->dev, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_auth_and_reset); > + > +/** > + * qcom_pas_prepare_and_auth_reset() - Prepare, authenticate, and reset the > + * remote processor > + * > + * @ctx: Context saved during call to qcom_scm_pas_context_init() > + * > + * This function performs the necessary steps to prepare a PAS subsystem, > + * authenticate it using the provided metadata, and initiate a reset sequence. > + * > + * It should be used when Linux is in control setting up the IOMMU hardware > + * for remote subsystem during secure firmware loading processes. The > + * preparation step sets up a shmbridge over the firmware memory before > + * TrustZone accesses the firmware memory region for authentication. The > + * authentication step verifies the integrity and authenticity of the firmware > + * or configuration using secure metadata. Finally, the reset step ensures the > + * subsystem starts in a clean and sane state. > + * > + * Return: 0 on success, negative errno on failure. > + */ > +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx) > +{ Same here. > + if (ops_ptr) > + return ops_ptr->prepare_and_auth_reset(ops_ptr->dev, ctx); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_prepare_and_auth_reset); > + > +/** > + * qcom_pas_set_remote_state() - Set the remote processor state > + * @state: peripheral state > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_set_remote_state(u32 state, u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->set_remote_state(ops_ptr->dev, state, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_set_remote_state); > + > +/** > + * qcom_pas_shutdown() - Shut down the remote processor > + * @pas_id: peripheral authentication service id > + * > + * Return: 0 on success. > + */ > +int qcom_pas_shutdown(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->shutdown(ops_ptr->dev, pas_id); > + > + return -ENODEV; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_shutdown); > + > +/** > + * qcom_pas_supported() - Check if the peripheral authentication service is > + * available for the given peripheral > + * @pas_id: peripheral authentication service id > + * > + * Return: true if PAS is supported for this peripheral, otherwise false. > + */ > +bool qcom_pas_supported(u32 pas_id) > +{ > + if (ops_ptr) > + return ops_ptr->supported(ops_ptr->dev, pas_id); > + > + return false; > +} > +EXPORT_SYMBOL_GPL(qcom_pas_supported); > + > +/** > + * qcom_pas_is_available() - Check for PAS service > + * > + * Return: true on success. > + */ > +bool qcom_pas_is_available(void) > +{ > + /* > + * The barrier for ops_ptr is intended to synchronize the data stores > + * for the ops data structure when client drivers are in parallel > + * checking for PAS service availability. > + * > + * Once the PAS backend becomes available, it is allowed for multiple > + * threads to enter TZ for parallel bringup of co-processors during > + * boot. > + */ > + return !!smp_load_acquire(&ops_ptr); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_is_available); > + > +/** > + * qcom_pas_ops_register() - Register PAS service ops > + * @ops: PAS service ops pointer > + */ > +void qcom_pas_ops_register(struct qcom_pas_ops *ops) > +{ > + if (!qcom_pas_is_available()) > + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ > + smp_store_release(&ops_ptr, ops); > + else > + pr_err("qcom_pas: ops already registered\n"); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_ops_register); > + > +/** > + * qcom_pas_ops_unregister() - Unregister PAS service ops > + */ > +void qcom_pas_ops_unregister(void) > +{ > + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ > + smp_store_release(&ops_ptr, NULL); > +} > +EXPORT_SYMBOL_GPL(qcom_pas_ops_unregister); > + > +MODULE_LICENSE("GPL"); > +MODULE_DESCRIPTION("Qualcomm common TZ PAS driver"); > diff --git a/drivers/firmware/qcom/qcom_pas.h b/drivers/firmware/qcom/qcom_pas.h > new file mode 100644 > index 000000000000..4ebed22178f8 > --- /dev/null > +++ b/drivers/firmware/qcom/qcom_pas.h > @@ -0,0 +1,53 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __QCOM_PAS_INT_H > +#define __QCOM_PAS_INT_H > + > +struct device; > + > +/** > + * struct qcom_pas_ops - Qcom Peripheral Authentication Service (PAS) ops > + * @drv_name: PAS driver name. > + * @dev: PAS device pointer. > + * @supported: Peripheral supported callback. > + * @init_image: Peripheral image initialization callback. > + * @mem_setup: Peripheral memory setup callback. > + * @get_rsc_table: Peripheral get resource table callback. > + * @prepare_and_auth_reset: Peripheral prepare firmware authentication and > + * reset callback. > + * @auth_and_reset: Peripheral firmware authentication and reset > + * callback. > + * @set_remote_state: Peripheral set remote state callback. > + * @shutdown: Peripheral shutdown callback. > + * @metadata_release: Image metadata release callback. > + */ > +struct qcom_pas_ops { > + const char *drv_name; > + struct device *dev; > + bool (*supported)(struct device *dev, u32 pas_id); > + int (*init_image)(struct device *dev, u32 pas_id, > + const void *metadata, size_t size, > + struct qcom_pas_context *ctx); > + int (*mem_setup)(struct device *dev, u32 pas_id, > + phys_addr_t addr, phys_addr_t size); > + void *(*get_rsc_table)(struct device *dev, > + struct qcom_pas_context *ctx, > + void *input_rt, > + size_t input_rt_size, > + size_t *output_rt_size); > + int (*prepare_and_auth_reset)(struct device *dev, > + struct qcom_pas_context *ctx); > + int (*auth_and_reset)(struct device *dev, u32 pas_id); > + int (*set_remote_state)(struct device *dev, u32 state, u32 pas_id); > + int (*shutdown)(struct device *dev, u32 pas_id); > + void (*metadata_release)(struct device *dev, > + struct qcom_pas_context *ctx); > +}; > + > +void qcom_pas_ops_register(struct qcom_pas_ops *ops); > +void qcom_pas_ops_unregister(void); > + > +#endif /* __QCOM_PAS_INT_H */ > diff --git a/include/linux/firmware/qcom/qcom_pas.h b/include/linux/firmware/qcom/qcom_pas.h > new file mode 100644 > index 000000000000..ef7328ecfa47 > --- /dev/null > +++ b/include/linux/firmware/qcom/qcom_pas.h > @@ -0,0 +1,41 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __QCOM_PAS_H > +#define __QCOM_PAS_H > + > +#include > +#include > + > +struct qcom_pas_context { > + struct device *dev; > + u32 pas_id; > + phys_addr_t mem_phys; > + size_t mem_size; > + void *ptr; > + dma_addr_t phys; > + ssize_t size; > + bool use_tzmem; > +}; > + > +bool qcom_pas_is_available(void); > +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, > + u32 pas_id, > + phys_addr_t mem_phys, > + size_t mem_size); > +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, > + struct qcom_pas_context *ctx); > +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, > + void *input_rt, size_t input_rt_size, > + size_t *output_rt_size); > +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size); > +int qcom_pas_auth_and_reset(u32 pas_id); > +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx); > +int qcom_pas_set_remote_state(u32 state, u32 pas_id); > +int qcom_pas_shutdown(u32 pas_id); > +bool qcom_pas_supported(u32 pas_id); > +void qcom_pas_metadata_release(struct qcom_pas_context *ctx); > + > +#endif /* __QCOM_PAS_H */ Regards, Harshal