diff for duplicates of <1257882118.14374.2@antares> diff --git a/a/1.txt b/N1/1.txt index 5365c15..04ecbaa 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ Merge the WDT code into the GPT interface. -Signed-off-by: Albrecht Dre=DF <albrecht.dress@arcor.de> +Signed-off-by: Albrecht Dreß <albrecht.dress@arcor.de> --- Notes: @@ -11,21 +11,17 @@ exceeds the range of an int, some api's had to be changed to u64. The WDT api is exported as to keep the WDT driver separated from the GPT driver. -If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function (i.e= -. -they will fail with -EBUSY). IOW, the safety function always has precedenc= -e +If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function (i.e. +they will fail with -EBUSY). IOW, the safety function always has precedence over the GPT function. If the kernel has been compiled with CONFIG_WATCHDOG_NOWAYOUT, this means that GPT0 is locked in WDT mode until the next reboot - this may be a requirement in safety applications. arch/powerpc/include/asm/mpc52xx.h | 18 ++- - arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 281 +++++++++++++++++++++++++= -+--- + arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 281 ++++++++++++++++++++++++++--- 2 files changed, 270 insertions(+), 29 deletions(-) -diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/= -mpc52xx.h +diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 707ab75..0ece07f 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h @@ -33,12 +29,10 @@ index 707ab75..0ece07f 100644 /* mpc52xx_gpt.c */ struct mpc52xx_gpt_priv; extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq); --extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int perio= -d, +-extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period, - int continuous); -extern void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt); -+extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 perio= -d, ++extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period, + int continuous); +extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt); +extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt); @@ -53,22 +47,21 @@ d, +#endif /* CONFIG_WATCHDOG_NOWAYOUT */ +#endif /* CONFIG_MPC5200_WDT */ + -=20 + /* mpc52xx_lpbfifo.c */ #define MPC52XX_LPBFIFO_FLAG_READ (0) -diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platf= -orms/52xx/mpc52xx_gpt.c +diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c index 2c3fa13..8274ebb 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c @@ -60,9 +60,13 @@ #include <asm/mpc52xx.h> -=20 + MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); -MODULE_AUTHOR("Sascha Hauer, Grant Likely"); -+MODULE_AUTHOR("Sascha Hauer, Grant Likely, Albrecht Dre=DF"); ++MODULE_AUTHOR("Sascha Hauer, Grant Likely, Albrecht Dreß"); MODULE_LICENSE("GPL"); -=20 + +#if (defined(CONFIG_MPC5200_WDT)) || (defined(CONFIG_MPC5200_WDT_MODULE)) +#define HAVE_MPC5200_WDT +#endif @@ -92,7 +85,7 @@ index 2c3fa13..8274ebb 100644 +#if defined(HAVE_MPC5200_WDT) + u8 wdt_mode; +#endif -=20 + #if defined(CONFIG_GPIOLIB) struct of_gpio_chip of_gc; @@ -101,14 +110,23 @@ DEFINE_MUTEX(mpc52xx_gpt_list_mutex); @@ -100,16 +93,16 @@ index 2c3fa13..8274ebb 100644 #define MPC52xx_GPT_MODE_OPEN_DRAIN (0x0200) #define MPC52xx_GPT_MODE_IRQ_EN (0x0100) +#define MPC52xx_GPT_MODE_WDT_EN (0x8000) -=20 + #define MPC52xx_GPT_MODE_ICT_MASK (0x030000) #define MPC52xx_GPT_MODE_ICT_RISING (0x010000) #define MPC52xx_GPT_MODE_ICT_FALLING (0x020000) #define MPC52xx_GPT_MODE_ICT_TOGGLE (0x030000) -=20 + +#define MPC52xx_GPT_MODE_WDT_PING (0xa5) + #define MPC52xx_GPT_STATUS_IRQMASK (0x000f) -=20 + +#define NS_PER_SEC 1000000000LL + +#define MPC52xx_GPT_CAN_WDT (1 << 0) @@ -119,11 +112,10 @@ index 2c3fa13..8274ebb 100644 /* --------------------------------------------------------------------- * Cascaded interrupt controller hooks */ -@@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq= -) +@@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq) } EXPORT_SYMBOL(mpc52xx_gpt_from_irq); -=20 + -/** - * mpc52xx_gpt_start_timer - Set and enable the GPT timer - * @gpt: Pointer to gpt private data structure @@ -144,34 +136,33 @@ index 2c3fa13..8274ebb 100644 u32 prescale; - unsigned long flags; - -- clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; -- set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; +- clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; +- set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; - if (continuous) -- set |=3D MPC52xx_GPT_MODE_CONTINUOUS; -=20 +- set |= MPC52xx_GPT_MODE_CONTINUOUS; + /* Determine the number of clocks in the requested period. 64 bit * arithmatic is done here to preserve the precision until the value - * is scaled back down into the u32 range. Period is in 'ns', bus - * frequency is in Hz. */ -- clocks =3D (u64)period * (u64)gpt->ipb_freq; +- clocks = (u64)period * (u64)gpt->ipb_freq; - do_div(clocks, 1000000000); /* Scale it down to ns range */ + * is scaled back down into the u32 range. */ -+ clocks =3D period * ipb_freq; ++ clocks = period * ipb_freq; + do_div(clocks, NS_PER_SEC); /* Scale it down to ns range */ -=20 + - /* This device cannot handle a clock count greater than 32 bits */ - if (clocks > 0xffffffff) + /* the maximum count is 0x10000 pre-scaler * 0xffff count */ + if (clocks > 0xffff0000) return -EINVAL; -=20 + /* Calculate the prescaler and count values from the clocks value. -@@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *g= -pt, int period, +@@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period, return -EINVAL; } -=20 -+ *reg_val =3D (prescale & 0xffff) << 16 | clocks; + ++ *reg_val = (prescale & 0xffff) << 16 | clocks; + return 0; +} + @@ -200,13 +191,13 @@ pt, int period, + spin_unlock_irqrestore(&gpt->lock, flags); +#endif + -+ clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; -+ set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; ++ clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; ++ set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; + if (continuous) -+ set |=3D MPC52xx_GPT_MODE_CONTINUOUS; ++ set |= MPC52xx_GPT_MODE_CONTINUOUS; + + if (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_freq, -+ &counter_reg) !=3D 0) ++ &counter_reg) != 0) + return -EINVAL; + /* Set and enable the timer */ @@ -215,12 +206,11 @@ pt, int period, + out_be32(&gpt->regs->count, counter_reg); clrsetbits_be32(&gpt->regs->mode, clear, set); spin_unlock_irqrestore(&gpt->lock, flags); -=20 -@@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv = -*gpt, int period, + +@@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period, } EXPORT_SYMBOL(mpc52xx_gpt_start_timer); -=20 + -void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt) +/** + * mpc52xx_gpt_timer_period - Return the timer period in nanoseconds @@ -233,14 +223,14 @@ pt, int period, + unsigned long flags; + + spin_lock_irqsave(&gpt->lock, flags); -+ period =3D in_be32(&gpt->regs->count); ++ period = in_be32(&gpt->regs->count); + spin_unlock_irqrestore(&gpt->lock, flags); + -+ prescale =3D period >> 16; -+ period &=3D 0xffff; -+ if (prescale =3D=3D 0) -+ prescale =3D 0x10000; -+ period =3D period * (u64) prescale * NS_PER_SEC; ++ prescale = period >> 16; ++ period &= 0xffff; ++ if (prescale == 0) ++ prescale = 0x10000; ++ period = period * (u64) prescale * NS_PER_SEC; + do_div(period, (u64)gpt->ipb_freq); + return period; +} @@ -264,7 +254,7 @@ pt, int period, + return 0; } EXPORT_SYMBOL(mpc52xx_gpt_stop_timer); -=20 + +#if defined(HAVE_MPC5200_WDT) +/** + * mpc52xx_gpt_wdt_probe - Find the wdt devide in the gpt list @@ -272,12 +262,12 @@ pt, int period, +struct mpc52xx_gpt_priv *mpc52xx_gpt_wdt_probe(void) +{ + struct list_head *pos; -+ struct mpc52xx_gpt_priv *this_gpt =3D NULL; ++ struct mpc52xx_gpt_priv *this_gpt = NULL; + + /* find the wdt device in our list */ + mutex_lock(&mpc52xx_gpt_list_mutex); + list_for_each(pos, &mpc52xx_gpt_list) { -+ this_gpt =3D container_of(pos, struct mpc52xx_gpt_priv, list); ++ this_gpt = container_of(pos, struct mpc52xx_gpt_priv, list); + if ((this_gpt->wdt_mode & MPC52xx_GPT_CAN_WDT)) { + mutex_unlock(&mpc52xx_gpt_list_mutex); + return this_gpt; @@ -296,8 +286,7 @@ pt, int period, + * Note: the function does not protect itself form being called without a + * timer or with a timer which cannot function as wdt. + */ -+int mpc52xx_gpt_wdt_start(struct mpc52xx_gpt_priv *gpt_wdt, int wdt_timeou= -t) ++int mpc52xx_gpt_wdt_start(struct mpc52xx_gpt_priv *gpt_wdt, int wdt_timeout) +{ + u32 clear, set; + u32 counter_reg; @@ -306,21 +295,21 @@ t) + /* calculate register settings */ + if (mpc52xx_gpt_calc_counter_input((u64) wdt_timeout * NS_PER_SEC, + (u64)gpt_wdt->ipb_freq, -+ &counter_reg) !=3D 0) { ++ &counter_reg) != 0) { + dev_info(gpt_wdt->dev, "bad timeout value %d\n", wdt_timeout); + return -EINVAL; + } + -+ clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS | ++ clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS | + MPC52xx_GPT_MODE_IRQ_EN; -+ set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE | ++ set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE | + MPC52xx_GPT_MODE_WDT_EN; + + /* set the time-out and launch as wdt */ + spin_lock_irqsave(&gpt_wdt->lock, flags); + out_be32(&gpt_wdt->regs->count, counter_reg); + clrsetbits_be32(&gpt_wdt->regs->mode, clear, set); -+ gpt_wdt->wdt_mode |=3D MPC52xx_GPT_IS_WDT; ++ gpt_wdt->wdt_mode |= MPC52xx_GPT_IS_WDT; + spin_unlock_irqrestore(&gpt_wdt->lock, flags); + + return 0; @@ -362,7 +351,7 @@ t) + spin_lock_irqsave(&gpt_wdt->lock, flags); + clrbits32(&gpt_wdt->regs->mode, + MPC52xx_GPT_MODE_COUNTER_ENABLE | MPC52xx_GPT_MODE_WDT_EN); -+ gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT; ++ gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT; + spin_unlock_irqrestore(&gpt_wdt->lock, flags); +#endif + return 0; @@ -384,7 +373,7 @@ t) + spin_lock_irqsave(&gpt_wdt->lock, flags); + clrbits32(&gpt_wdt->regs->mode, + MPC52xx_GPT_MODE_COUNTER_ENABLE | MPC52xx_GPT_MODE_WDT_EN); -+ gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT; ++ gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT; + spin_unlock_irqrestore(&gpt_wdt->lock, flags); + return 0; +} @@ -395,25 +384,24 @@ t) /* --------------------------------------------------------------------- * of_platform bus binding code */ -@@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct of_devic= -e *ofdev, +@@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, list_add(&gpt->list, &mpc52xx_gpt_list); mutex_unlock(&mpc52xx_gpt_list_mutex); -=20 + +#if defined(HAVE_MPC5200_WDT) + /* check if this device could be a watchdog */ + if (of_get_property(ofdev->node, "fsl,has-wdt", NULL) || + of_get_property(ofdev->node, "has-wdt", NULL)) { + const u32 *on_boot_wdt; + -+ gpt->wdt_mode =3D MPC52xx_GPT_CAN_WDT; ++ gpt->wdt_mode = MPC52xx_GPT_CAN_WDT; + + /* check if the device shall be used as on-boot watchdog */ -+ on_boot_wdt =3D of_get_property(ofdev->node, "wdt,on-boot", NULL); ++ on_boot_wdt = of_get_property(ofdev->node, "wdt,on-boot", NULL); + if (on_boot_wdt) { -+ gpt->wdt_mode |=3D MPC52xx_GPT_IS_WDT; ++ gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; + if (*on_boot_wdt > 0 && -+ mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) =3D=3D 0) ++ mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) == 0) + dev_info(gpt->dev, + "running as wdt, timeout %us\n", + *on_boot_wdt); @@ -426,4 +414,3 @@ e *ofdev, + return 0; } -=20 diff --git a/a/content_digest b/N1/content_digest index ade114e..339edec 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -9,7 +9,7 @@ "b\0" "Merge the WDT code into the GPT interface.\n" "\n" - "Signed-off-by: Albrecht Dre=DF <albrecht.dress@arcor.de>\n" + "Signed-off-by: Albrecht Dre\303\237 <albrecht.dress@arcor.de>\n" "---\n" "\n" "Notes:\n" @@ -20,21 +20,17 @@ "The WDT api is exported as to keep the WDT driver separated from the GPT\n" "driver.\n" "\n" - "If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function (i.e=\n" - ".\n" - "they will fail with -EBUSY). IOW, the safety function always has precedenc=\n" - "e\n" + "If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function (i.e.\n" + "they will fail with -EBUSY). IOW, the safety function always has precedence\n" "over the GPT function. If the kernel has been compiled with\n" "CONFIG_WATCHDOG_NOWAYOUT, this means that GPT0 is locked in WDT mode until\n" "the next reboot - this may be a requirement in safety applications.\n" "\n" " arch/powerpc/include/asm/mpc52xx.h | 18 ++-\n" - " arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 281 +++++++++++++++++++++++++=\n" - "+---\n" + " arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 281 ++++++++++++++++++++++++++---\n" " 2 files changed, 270 insertions(+), 29 deletions(-)\n" "\n" - "diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/=\n" - "mpc52xx.h\n" + "diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h\n" "index 707ab75..0ece07f 100644\n" "--- a/arch/powerpc/include/asm/mpc52xx.h\n" "+++ b/arch/powerpc/include/asm/mpc52xx.h\n" @@ -42,12 +38,10 @@ " /* mpc52xx_gpt.c */\n" " struct mpc52xx_gpt_priv;\n" " extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq);\n" - "-extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int perio=\n" - "d,\n" + "-extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period,\n" "- int continuous);\n" "-extern void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);\n" - "+extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 perio=\n" - "d,\n" + "+extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,\n" "+\t\t\t\t int continuous);\n" "+extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);\n" "+extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt);\n" @@ -62,22 +56,21 @@ "+#endif /* CONFIG_WATCHDOG_NOWAYOUT */\n" "+#endif /* CONFIG_MPC5200_WDT */\n" "+\n" - "=20\n" + " \n" " /* mpc52xx_lpbfifo.c */\n" " #define MPC52XX_LPBFIFO_FLAG_READ\t\t(0)\n" - "diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platf=\n" - "orms/52xx/mpc52xx_gpt.c\n" + "diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "index 2c3fa13..8274ebb 100644\n" "--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "@@ -60,9 +60,13 @@\n" " #include <asm/mpc52xx.h>\n" - "=20\n" + " \n" " MODULE_DESCRIPTION(\"Freescale MPC52xx gpt driver\");\n" "-MODULE_AUTHOR(\"Sascha Hauer, Grant Likely\");\n" - "+MODULE_AUTHOR(\"Sascha Hauer, Grant Likely, Albrecht Dre=DF\");\n" + "+MODULE_AUTHOR(\"Sascha Hauer, Grant Likely, Albrecht Dre\303\237\");\n" " MODULE_LICENSE(\"GPL\");\n" - "=20\n" + " \n" "+#if (defined(CONFIG_MPC5200_WDT)) || (defined(CONFIG_MPC5200_WDT_MODULE))\n" "+#define HAVE_MPC5200_WDT\n" "+#endif\n" @@ -101,7 +94,7 @@ "+#if defined(HAVE_MPC5200_WDT)\n" "+\tu8 wdt_mode;\n" "+#endif\n" - "=20\n" + " \n" " #if defined(CONFIG_GPIOLIB)\n" " \tstruct of_gpio_chip of_gc;\n" "@@ -101,14 +110,23 @@ DEFINE_MUTEX(mpc52xx_gpt_list_mutex);\n" @@ -109,16 +102,16 @@ " #define MPC52xx_GPT_MODE_OPEN_DRAIN\t(0x0200)\n" " #define MPC52xx_GPT_MODE_IRQ_EN\t\t(0x0100)\n" "+#define MPC52xx_GPT_MODE_WDT_EN\t\t(0x8000)\n" - "=20\n" + " \n" " #define MPC52xx_GPT_MODE_ICT_MASK\t(0x030000)\n" " #define MPC52xx_GPT_MODE_ICT_RISING\t(0x010000)\n" " #define MPC52xx_GPT_MODE_ICT_FALLING\t(0x020000)\n" " #define MPC52xx_GPT_MODE_ICT_TOGGLE\t(0x030000)\n" - "=20\n" + " \n" "+#define MPC52xx_GPT_MODE_WDT_PING\t(0xa5)\n" "+\n" " #define MPC52xx_GPT_STATUS_IRQMASK\t(0x000f)\n" - "=20\n" + " \n" "+#define NS_PER_SEC\t\t\t1000000000LL\n" "+\n" "+#define MPC52xx_GPT_CAN_WDT\t\t(1 << 0)\n" @@ -128,11 +121,10 @@ " /* ---------------------------------------------------------------------\n" " * Cascaded interrupt controller hooks\n" " */\n" - "@@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq=\n" - ")\n" + "@@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq)\n" " }\n" " EXPORT_SYMBOL(mpc52xx_gpt_from_irq);\n" - "=20\n" + " \n" "-/**\n" "- * mpc52xx_gpt_start_timer - Set and enable the GPT timer\n" "- * @gpt: Pointer to gpt private data structure\n" @@ -153,34 +145,33 @@ " \tu32 prescale;\n" "-\tunsigned long flags;\n" "-\n" - "-\tclear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" - "-\tset =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" + "-\tclear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" + "-\tset = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" "-\tif (continuous)\n" - "-\t\tset |=3D MPC52xx_GPT_MODE_CONTINUOUS;\n" - "=20\n" + "-\t\tset |= MPC52xx_GPT_MODE_CONTINUOUS;\n" + " \n" " \t/* Determine the number of clocks in the requested period. 64 bit\n" " \t * arithmatic is done here to preserve the precision until the value\n" "-\t * is scaled back down into the u32 range. Period is in 'ns', bus\n" "-\t * frequency is in Hz. */\n" - "-\tclocks =3D (u64)period * (u64)gpt->ipb_freq;\n" + "-\tclocks = (u64)period * (u64)gpt->ipb_freq;\n" "-\tdo_div(clocks, 1000000000); /* Scale it down to ns range */\n" "+\t * is scaled back down into the u32 range. */\n" - "+\tclocks =3D period * ipb_freq;\n" + "+\tclocks = period * ipb_freq;\n" "+\tdo_div(clocks, NS_PER_SEC); /* Scale it down to ns range */\n" - "=20\n" + " \n" "-\t/* This device cannot handle a clock count greater than 32 bits */\n" "-\tif (clocks > 0xffffffff)\n" "+\t/* the maximum count is 0x10000 pre-scaler * 0xffff count */\n" "+\tif (clocks > 0xffff0000)\n" " \t\treturn -EINVAL;\n" - "=20\n" + " \n" " \t/* Calculate the prescaler and count values from the clocks value.\n" - "@@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *g=\n" - "pt, int period,\n" + "@@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period,\n" " \t\treturn -EINVAL;\n" " \t}\n" - "=20\n" - "+\t*reg_val =3D (prescale & 0xffff) << 16 | clocks;\n" + " \n" + "+\t*reg_val = (prescale & 0xffff) << 16 | clocks;\n" "+\treturn 0;\n" "+}\n" "+\n" @@ -209,13 +200,13 @@ "+\tspin_unlock_irqrestore(&gpt->lock, flags);\n" "+#endif\n" "+\n" - "+\tclear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" - "+\tset =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" + "+\tclear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" + "+\tset = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" "+\tif (continuous)\n" - "+\t\tset |=3D MPC52xx_GPT_MODE_CONTINUOUS;\n" + "+\t\tset |= MPC52xx_GPT_MODE_CONTINUOUS;\n" "+\n" "+\tif (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_freq,\n" - "+\t\t\t\t\t &counter_reg) !=3D 0)\n" + "+\t\t\t\t\t &counter_reg) != 0)\n" "+\t\treturn -EINVAL;\n" "+\n" " \t/* Set and enable the timer */\n" @@ -224,12 +215,11 @@ "+\tout_be32(&gpt->regs->count, counter_reg);\n" " \tclrsetbits_be32(&gpt->regs->mode, clear, set);\n" " \tspin_unlock_irqrestore(&gpt->lock, flags);\n" - "=20\n" - "@@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv =\n" - "*gpt, int period,\n" + " \n" + "@@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period,\n" " }\n" " EXPORT_SYMBOL(mpc52xx_gpt_start_timer);\n" - "=20\n" + " \n" "-void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)\n" "+/**\n" "+ * mpc52xx_gpt_timer_period - Return the timer period in nanoseconds\n" @@ -242,14 +232,14 @@ "+\tunsigned long flags;\n" "+\n" "+\tspin_lock_irqsave(&gpt->lock, flags);\n" - "+\tperiod =3D in_be32(&gpt->regs->count);\n" + "+\tperiod = in_be32(&gpt->regs->count);\n" "+\tspin_unlock_irqrestore(&gpt->lock, flags);\n" "+\n" - "+\tprescale =3D period >> 16;\n" - "+\tperiod &=3D 0xffff;\n" - "+\tif (prescale =3D=3D 0)\n" - "+\t\tprescale =3D 0x10000;\n" - "+\tperiod =3D period * (u64) prescale * NS_PER_SEC;\n" + "+\tprescale = period >> 16;\n" + "+\tperiod &= 0xffff;\n" + "+\tif (prescale == 0)\n" + "+\t\tprescale = 0x10000;\n" + "+\tperiod = period * (u64) prescale * NS_PER_SEC;\n" "+\tdo_div(period, (u64)gpt->ipb_freq);\n" "+\treturn period;\n" "+}\n" @@ -273,7 +263,7 @@ "+\treturn 0;\n" " }\n" " EXPORT_SYMBOL(mpc52xx_gpt_stop_timer);\n" - "=20\n" + " \n" "+#if defined(HAVE_MPC5200_WDT)\n" "+/**\n" "+ * mpc52xx_gpt_wdt_probe - Find the wdt devide in the gpt list\n" @@ -281,12 +271,12 @@ "+struct mpc52xx_gpt_priv *mpc52xx_gpt_wdt_probe(void)\n" "+{\n" "+\tstruct list_head *pos;\n" - "+\tstruct mpc52xx_gpt_priv *this_gpt =3D NULL;\n" + "+\tstruct mpc52xx_gpt_priv *this_gpt = NULL;\n" "+\n" "+\t/* find the wdt device in our list */\n" "+\tmutex_lock(&mpc52xx_gpt_list_mutex);\n" "+\tlist_for_each(pos, &mpc52xx_gpt_list) {\n" - "+\t\tthis_gpt =3D container_of(pos, struct mpc52xx_gpt_priv, list);\n" + "+\t\tthis_gpt = container_of(pos, struct mpc52xx_gpt_priv, list);\n" "+\t\tif ((this_gpt->wdt_mode & MPC52xx_GPT_CAN_WDT)) {\n" "+\t\t\tmutex_unlock(&mpc52xx_gpt_list_mutex);\n" "+\t\t\treturn this_gpt;\n" @@ -305,8 +295,7 @@ "+ * Note: the function does not protect itself form being called without a\n" "+ * timer or with a timer which cannot function as wdt.\n" "+ */\n" - "+int mpc52xx_gpt_wdt_start(struct mpc52xx_gpt_priv *gpt_wdt, int wdt_timeou=\n" - "t)\n" + "+int mpc52xx_gpt_wdt_start(struct mpc52xx_gpt_priv *gpt_wdt, int wdt_timeout)\n" "+{\n" "+\tu32 clear, set;\n" "+\tu32 counter_reg;\n" @@ -315,21 +304,21 @@ "+\t/* calculate register settings */\n" "+\tif (mpc52xx_gpt_calc_counter_input((u64) wdt_timeout * NS_PER_SEC,\n" "+\t\t\t\t\t (u64)gpt_wdt->ipb_freq,\n" - "+\t\t\t\t\t &counter_reg) !=3D 0) {\n" + "+\t\t\t\t\t &counter_reg) != 0) {\n" "+\t\tdev_info(gpt_wdt->dev, \"bad timeout value %d\\n\", wdt_timeout);\n" "+\t\treturn -EINVAL;\n" "+\t}\n" "+\n" - "+\tclear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS |\n" + "+\tclear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS |\n" "+\t\tMPC52xx_GPT_MODE_IRQ_EN;\n" - "+\tset =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" + "+\tset = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" "+\t\tMPC52xx_GPT_MODE_WDT_EN;\n" "+\n" "+\t/* set the time-out and launch as wdt */\n" "+\tspin_lock_irqsave(&gpt_wdt->lock, flags);\n" "+\tout_be32(&gpt_wdt->regs->count, counter_reg);\n" "+\tclrsetbits_be32(&gpt_wdt->regs->mode, clear, set);\n" - "+\tgpt_wdt->wdt_mode |=3D MPC52xx_GPT_IS_WDT;\n" + "+\tgpt_wdt->wdt_mode |= MPC52xx_GPT_IS_WDT;\n" "+\tspin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" "+\n" "+\treturn 0;\n" @@ -371,7 +360,7 @@ "+\tspin_lock_irqsave(&gpt_wdt->lock, flags);\n" "+\tclrbits32(&gpt_wdt->regs->mode,\n" "+\t\t MPC52xx_GPT_MODE_COUNTER_ENABLE | MPC52xx_GPT_MODE_WDT_EN);\n" - "+\tgpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT;\n" + "+\tgpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT;\n" "+\tspin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" "+#endif\n" "+\treturn 0;\n" @@ -393,7 +382,7 @@ "+\tspin_lock_irqsave(&gpt_wdt->lock, flags);\n" "+\tclrbits32(&gpt_wdt->regs->mode,\n" "+\t\t MPC52xx_GPT_MODE_COUNTER_ENABLE | MPC52xx_GPT_MODE_WDT_EN);\n" - "+\tgpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT;\n" + "+\tgpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT;\n" "+\tspin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" "+\treturn 0;\n" "+}\n" @@ -404,25 +393,24 @@ " /* ---------------------------------------------------------------------\n" " * of_platform bus binding code\n" " */\n" - "@@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct of_devic=\n" - "e *ofdev,\n" + "@@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev,\n" " \tlist_add(&gpt->list, &mpc52xx_gpt_list);\n" " \tmutex_unlock(&mpc52xx_gpt_list_mutex);\n" - "=20\n" + " \n" "+#if defined(HAVE_MPC5200_WDT)\n" "+\t/* check if this device could be a watchdog */\n" "+\tif (of_get_property(ofdev->node, \"fsl,has-wdt\", NULL) ||\n" "+\t of_get_property(ofdev->node, \"has-wdt\", NULL)) {\n" "+\t\tconst u32 *on_boot_wdt;\n" "+\n" - "+\t\tgpt->wdt_mode =3D MPC52xx_GPT_CAN_WDT;\n" + "+\t\tgpt->wdt_mode = MPC52xx_GPT_CAN_WDT;\n" "+\n" "+\t\t/* check if the device shall be used as on-boot watchdog */\n" - "+\t\ton_boot_wdt =3D of_get_property(ofdev->node, \"wdt,on-boot\", NULL);\n" + "+\t\ton_boot_wdt = of_get_property(ofdev->node, \"wdt,on-boot\", NULL);\n" "+\t\tif (on_boot_wdt) {\n" - "+\t\t\tgpt->wdt_mode |=3D MPC52xx_GPT_IS_WDT;\n" + "+\t\t\tgpt->wdt_mode |= MPC52xx_GPT_IS_WDT;\n" "+\t\t\tif (*on_boot_wdt > 0 &&\n" - "+\t\t\t mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) =3D=3D 0)\n" + "+\t\t\t mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) == 0)\n" "+\t\t\t\tdev_info(gpt->dev,\n" "+\t\t\t\t\t \"running as wdt, timeout %us\\n\",\n" "+\t\t\t\t\t *on_boot_wdt);\n" @@ -434,7 +422,6 @@ "+#endif\n" "+\n" " \treturn 0;\n" - " }\n" - =20 + } -ce6e8a5ed680836309c8dc4e2199cb60e4b13647e164db4da7ca69f6d0b8b7e8 +bf4ecae8c99668498c9defe59a471b3058091f8fc2787176d5ae0a453fec6341
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