From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pavel Roskin Date: Fri, 22 Jan 2010 17:44:34 -0500 Subject: [ath9k-devel] D-Link DWA-547 completely freezes system In-Reply-To: <20100122222304.GL2283@tux> References: <1264111259.10053.6.camel@mj> <43e72e891001211426p603c7108y513787a61a88da4c@mail.gmail.com> <1264128820.3766.8.camel@ct> <1264182734.12386.12.camel@mj> <4B59EDEA.3090001@dti2.net> <1264198663.9056.11.camel@mj> <20100122222304.GL2283@tux> Message-ID: <1264200274.9056.23.camel@mj> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org On Fri, 2010-01-22 at 14:23 -0800, Luis R. Rodriguez wrote: > I'm baffled, why would initializing some 5 Ghz stuff be required for > a 2ghz only card. Unless hardware requires this.. we're still looking > into this. The fixup changes the initial value for the register 0x7894 (AR_AN_TOP2) from 0x5a508000 to 0x5a108000. It's done in the common memory, which explains the influence of SR71-15 on SR71-12. The right fix would be to adjust the initial value when it's programmed into the hardware instead of patching the common tables. I don't know if AR_AN_TOP2 is only for 5 GHz. -- Regards, Pavel Roskin