From: Peter Zijlstra <peterz@infradead.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: LKML <linux-kernel@vger.kernel.org>,
Stephane Eranian <eranian@google.com>
Subject: Re: [PATCH] perf, x86: Add Nehelem PMU programming errata workaround
Date: Fri, 26 Mar 2010 15:43:44 +0100 [thread overview]
Message-ID: <1269614624.12097.149.camel@laptop> (raw)
In-Reply-To: <1269608924.12097.147.camel@laptop>
On Fri, 2010-03-26 at 14:08 +0100, Peter Zijlstra wrote:
> Subject: perf, x86: Add Nehelem PMU programming errata workaround
> From: Peter Zijlstra <a.p.zijlstra@chello.nl>
> Date: Fri Mar 26 13:59:41 CET 2010
>
> Implement the workaround for Intel Errata AAK100 and AAP53.
>
> Also, remove the Core-i7 name for Nehalem events since there are also
> Westmere based i7 chips.
*sigh* it appears the westmere chips suffer this too according to the
new Xeon 5600 docs (BD53) .. I'll update the patch.
next prev parent reply other threads:[~2010-03-26 14:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-26 13:08 [PATCH] perf, x86: Add Nehelem PMU programming errata workaround Peter Zijlstra
2010-03-26 14:33 ` [tip:perf/core] " tip-bot for Peter Zijlstra
2010-03-26 14:43 ` Peter Zijlstra [this message]
2010-03-26 14:48 ` tip-bot for Peter Zijlstra
2010-03-27 21:27 ` [PATCH] " Andi Kleen
2010-03-28 21:53 ` Stephane Eranian
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