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Subject: Re: [PATCH 2/9] tracing: MIPS: mcount.S: Fixup of the 32bit
 support with gcc 4.5
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     David Daney <david.s.daney@gmail.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        linux-mips <linux-mips@linux-mips.org>
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Organization: DSLab, Lanzhou University, China
Date:   Thu, 13 May 2010 09:35:11 +0800
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On Wed, 2010-05-12 at 10:16 -0700, David Daney wrote:
> On 05/12/2010 06:23 AM, Wu Zhangjin wrote:
> > From: Wu Zhangjin<wuzhangjin@gmail.com>
> >
> > As the doc[1] of gcc-4.5 shows, the -mmcount-ra-address uses register
> > $12 to transfer the stack offset of the return address to the _mcount
> > function. in 64bit kernel, $12 is t0, but in 32bit kernel, it is t4, so,
> > we need to use $12 instead of t0 here to cover the 64bit and 32bit
> > support.
> >
> > [1] Gcc doc: MIPS Options
> > http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html
> >
> > Signed-off-by: Wu Zhangjin<wuzhangjin@gmail.com>
> 
> Would it be better to do?:
> 
> #define MCOUNT_RA_ADDRESS_REG $12
> 
> s/t0/MCOUNT_RA_ADDRESS_REG/g

Good idea, will change it later.

Regards,
	Wu Zhangjin