From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, cjashfor@linux.vnet.ibm.com,
mingo@elte.hu, fweisbec@gmail.com,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 1/2] perf-events: Add support for supplementary event registers v2
Date: Fri, 12 Nov 2010 18:33:12 +0100 [thread overview]
Message-ID: <1289583192.2084.339.camel@laptop> (raw)
In-Reply-To: <AANLkTimJ3nLwmRfmf+uTuUvg6HVrHBzrjgQXuTi5dxyp@mail.gmail.com>
On Fri, 2010-11-12 at 18:17 +0100, Stephane Eranian wrote:
> I looked at this patch thinking how could this be reused for LBR_SELECT.
>
> I am wondering if storing the extra MSR value in attr.config is really the way
> to go now as opposed to adding/overloading a field.
>
> For OFFCORE_RESPONSE, it makes sense to use attr.config because this is
> a refinement of the event (a sub-sub event if you want).
Correct, it makes sense for offcore and load-latency, not so much for
lbr_config.
> For LBR_SELECT, you also need to pass a value, but there is no specific event
> associated with it. You can enable LBR with any event you want. Thus,
> storing the
> LBR_SELECT value independently would also make sense. And if we have this
> field for LBR_SELECT then we may as well use it for OFFCORE_REPONSE.
That would assume a single event doesn't contain offcore and lbr, no?
Currently the extra_reg thing assumes there's only one extra reg encoded
in the config word.
> The alternative would be to consider LBR_SELECT also as a refinement of
> the event being measured. Though by itself, it wouldn't do anything, it would
> have to be combine with a PERF_SAMPLE_BRANCH_STACK to attr.sample_type.
A separate field for the lbr_config seems to make most sense, we could
of course use the top 16 bits for lbr, the next 16 for offcore/ll and
the bottom 32 for eventsel, but that's mighty crowded.
next prev parent reply other threads:[~2010-11-12 17:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-12 16:55 [PATCH 1/2] perf-events: Add support for supplementary event registers v2 Andi Kleen
2010-11-12 16:55 ` [PATCH 2/2] perf-events: Fix LLC-* events on Intel Nehalem/Westmere v2 Andi Kleen
2010-11-12 17:17 ` [PATCH 1/2] perf-events: Add support for supplementary event registers v2 Peter Zijlstra
2010-11-12 17:17 ` Stephane Eranian
2010-11-12 17:33 ` Peter Zijlstra [this message]
2010-11-12 21:26 ` Stephane Eranian
2010-11-13 10:17 ` Andi Kleen
2010-11-13 10:34 ` Peter Zijlstra
2010-11-15 11:03 ` Stephane Eranian
2010-11-15 11:06 ` Andi Kleen
2010-11-15 11:00 ` Stephane Eranian
2010-11-12 17:23 ` Peter Zijlstra
2010-11-13 10:13 ` Andi Kleen
2010-11-13 10:32 ` Peter Zijlstra
2010-11-15 11:01 ` Stephane Eranian
2010-11-15 11:06 ` Peter Zijlstra
2010-11-15 11:17 ` Andi Kleen
2010-11-15 11:18 ` Stephane Eranian
2010-11-15 11:31 ` Andi Kleen
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