From: Lin Ming <ming.m.lin@intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>,
Ingo Molnar <mingo@elte.hu>, Andi Kleen <andi@firstfloor.org>,
Frederic Weisbecker <fweisbec@gmail.com>,
Arjan van de Ven <arjan@infradead.org>,
lkml <linux-kernel@vger.kernel.org>, paulus <paulus@samba.org>
Subject: Re: [RFC PATCH] perf: Add load latency monitoring on Intel Nehalem/Westmere
Date: Thu, 23 Dec 2010 16:28:35 +0800 [thread overview]
Message-ID: <1293092915.2565.168.camel@minggr.sh.intel.com> (raw)
In-Reply-To: <1293014701.2170.111.camel@laptop>
On Wed, 2010-12-22 at 18:45 +0800, Peter Zijlstra wrote:
> On Wed, 2010-12-22 at 11:08 +0100, Stephane Eranian wrote:
> > Yes, I think there is more to it than just data source, unfortunately.
> > If you want to avoid returning an opaque u64 (PERF_SAMPLE_EXTRA), then
> > you need to break it down: PERF_SAMPLE_DATA_SRC, PERF_SAMPLE_XX
> > and so on.
>
> I guess we can do things like:
>
> Satisfied by {L1, L2, L3, RAM}x{snoop, local, remote} + unknown, and
> encode "Pending core cache HIT" as L2-snoop or something, whatever is
> most appropriate.
>
> But does that cover every architecture?
>
> Also, since that doesn't require more that 4 bits to encode, we could
> try and categorize what else is around and try and create a well
> specified _EXTRA register, I mean, we still got 60bits left after this.
Could you tell more about this well specified _EXTRA register?
next prev parent reply other threads:[~2010-12-23 8:24 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-22 8:12 [RFC PATCH] perf: Add load latency monitoring on Intel Nehalem/Westmere Lin Ming
2010-12-22 8:33 ` Peter Zijlstra
2010-12-22 8:47 ` Lin Ming
2010-12-22 9:04 ` Peter Zijlstra
2010-12-22 10:14 ` Ingo Molnar
2010-12-23 1:14 ` Lin Ming
2010-12-23 7:35 ` Andi Kleen
2010-12-22 9:00 ` Peter Zijlstra
2010-12-22 10:08 ` Stephane Eranian
2010-12-22 10:45 ` Peter Zijlstra
2010-12-22 10:49 ` Peter Zijlstra
2010-12-23 8:59 ` Lin Ming
2010-12-23 10:18 ` Peter Zijlstra
2010-12-23 10:31 ` Stephane Eranian
2010-12-23 10:48 ` Peter Zijlstra
2010-12-23 11:05 ` Stephane Eranian
2010-12-23 11:37 ` Peter Zijlstra
2010-12-23 8:28 ` Lin Ming [this message]
2010-12-23 10:11 ` Peter Zijlstra
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