From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=53562 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PeyWD-0005d6-DV for qemu-devel@nongnu.org; Mon, 17 Jan 2011 18:29:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PeyWB-0006yW-FT for qemu-devel@nongnu.org; Mon, 17 Jan 2011 18:29:49 -0500 Received: from ra.se.axis.com ([195.60.68.13]:59090) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PeyWB-0006xq-AB for qemu-devel@nongnu.org; Mon, 17 Jan 2011 18:29:47 -0500 From: edgar.iglesias@gmail.com Date: Tue, 18 Jan 2011 00:29:40 +0100 Message-Id: <1295306982-29629-2-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1295306982-29629-1-git-send-email-edgar.iglesias@gmail.com> References: <1295306982-29629-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH 1/3] mips: Break TBs after mfc0_count List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , aurelien@aurel32.net From: Edgar E. Iglesias Break the TB after reading the count register. This makes it possible to take timer interrupts immediately after a read of a possibly expired timer. Signed-off-by: Edgar E. Iglesias --- target-mips/translate.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index cce77be..313cc29 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3410,8 +3410,10 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, TCGv arg, int reg, int s gen_helper_mfc0_count(arg); if (use_icount) { gen_io_end(); - ctx->bstate = BS_STOP; } + /* Break the TB to be able to take timer interrupts immediately + after reading count. */ + ctx->bstate = BS_STOP; rn = "Count"; break; /* 6,7 are implementation dependent */ -- 1.7.2.2