From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Schmoller Date: Wed, 26 Jan 2011 16:03:21 -0600 Subject: [U-Boot] POST Problems on MPC8[5/6]xx Message-ID: <1296079401.8352.3.camel@johns> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello all, I'm seeing issues on our MPC8[5/6]xx products in relation to POST testing. I see that the POST word is stored in a spare, unused register in the PIC, but this register seems to be cleared during interrupt_init() when the PIC is reset. This means that I am seeing the POST_ROM tests run (pre interrupt_init()) but the word then gets blown away and the POST_RAM tests do not run (post interrupt_init()). I browsed through the MPC8572 UM and didn't see any obvious replacements for TFRR that wouldn't be reset. Do others see this issue? Freescale guys, are you aware of some other register we can use? Thanks, John