From: Peter Zijlstra <peterz@infradead.org>
To: Robert Richter <robert.richter@amd.com>
Cc: Stephane Eranian <eranian@google.com>,
Ingo Molnar <mingo@elte.hu>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 5/5] perf, x86: Add support for AMD family 15h core counters
Date: Thu, 03 Feb 2011 10:38:03 +0100 [thread overview]
Message-ID: <1296725883.26581.359.camel@laptop> (raw)
In-Reply-To: <20110203090001.GG5874@erda.amd.com>
On Thu, 2011-02-03 at 10:00 +0100, Robert Richter wrote:
>
>
> ok, nb events may be implemented independent from core events in a
> separate struct pmu.
>
> I still would prefer a lookup table for counter addresses. Adding a
> shift parameter to struct x86_pmu to do a
>
> addr = base + (index << shift)
>
> seems to me a quite special solution that may not be reused in other
> implementations
What other implementations? I hope people will not re-arrange the MSR
layout on every new model, that'd be quite annoying.
> while a lookup table is more generic. I also don't
> see a performance or memory impact there.
Well it is an extra pointer chase and data cache hit just to get
something you can trivially compute.
> Anyway, a shift parameter would work too. What do you think?
I think the alternatives thing is probably nicest, except for having to
write the bits in asm.
next prev parent reply other threads:[~2011-02-03 9:37 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-02 16:40 [PATCH 0/5] perf, x86: perf, x86: Add support for AMD family 15h core counters Robert Richter
2011-02-02 16:40 ` [PATCH 1/5] perf, x86: Use helper function in x86_pmu_enable_all() Robert Richter
2011-02-16 13:47 ` [tip:perf/core] " tip-bot for Robert Richter
2011-02-02 16:40 ` [PATCH 2/5] perf, x86: Calculate perfctr msr addresses in helper functions Robert Richter
2011-02-16 13:48 ` [tip:perf/core] " tip-bot for Robert Richter
2011-02-02 16:40 ` [PATCH 3/5] perf, x86: Add new AMD family 15h msrs to perfctr reservation code Robert Richter
2011-02-16 13:48 ` [tip:perf/core] " tip-bot for Robert Richter
2011-02-02 16:40 ` [PATCH 4/5] perf, x86: Store perfctr msr addresses in config_base/event_base Robert Richter
2011-02-16 13:48 ` [tip:perf/core] " tip-bot for Robert Richter
2011-02-02 16:41 ` [PATCH 5/5] perf, x86: Add support for AMD family 15h core counters Robert Richter
2011-02-02 17:03 ` Peter Zijlstra
2011-02-02 17:24 ` Robert Richter
2011-02-02 17:29 ` Peter Zijlstra
2011-02-02 22:44 ` Stephane Eranian
2011-02-03 9:00 ` Robert Richter
2011-02-03 9:38 ` Peter Zijlstra [this message]
2011-02-03 14:06 ` Robert Richter
2011-02-15 13:52 ` [PATCH] " Robert Richter
2011-02-16 13:49 ` [tip:perf/core] " tip-bot for Robert Richter
2011-02-02 20:38 ` [PATCH 0/5] perf, x86: " Stephane Eranian
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