From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andreas Schimmel <andreas.schimmel@freenet.de>
Date: Fri, 11 Feb 2011 10:27:55 +0100
Subject: [U-Boot]  Networking problem with LAN8700 PHY at Cogent CSB737
Message-ID: <1297416475.3514.24.camel@paul>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hello,

I'm trying to port U-Boot 2010.09 to Cogent CSB737 board. It has an
ATMEL At91SAM9263 uC and a SMSC LAN8700 PHY. U-Boot already runs quite
well, but with networking it has problems.

U-Boot detects the PHY and is able to send packages over LAN, but do not
receives any packages.

What could be the problem?

Thanks
Andreas Schimmel

Configs:

/* Ethernet */
#define CONFIG_MACB			1
#define CONFIG_RMII			1
#define CONFIG_NET_MULTI		1
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R		1

Source File:

#include <common.h>
#include <asm/sizes.h>
#include <asm/arch/at91sam9263.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_matrix.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
/*
#include <lcd.h>
#include <atmel_lcdc.h>
*/
#include <dataflash.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>


DECLARE_GLOBAL_DATA_PTR;

#ifdef CONFIG_CMD_NAND
static void csb737_nand_hw_init(void)
{
	unsigned long csa;
	at91_smc_t 	*smc 	= (at91_smc_t *) AT91_SMC0_BASE;
	at91_matrix_t 	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;

	/* Enable CS3 */
	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
	writel(csa, &matrix->csa[0]);

	/* Configure SMC CS3 for NAND/SmartMedia */
	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
		&smc->cs[3].setup);

	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
		&smc->cs[3].pulse);

	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
		&smc->cs[3].cycle);

	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
		AT91_SMC_MODE_EXNW_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
		AT91_SMC_MODE_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
		AT91_SMC_MODE_DBW_8 |
#endif
		AT91_SMC_MODE_TDF_CYCLE(2),
		&smc->cs[3].mode);

	/* Configure RDY/BSY */
	at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);

	/* Enable NandFlash */
	at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif

#ifdef CONFIG_MACB
static void csb737_macb_hw_init(void)
{
	unsigned long 	erstl;
	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
	at91_pio_t	*pio	= (at91_pio_t *) AT91_PIO_BASE;
	at91_rstc_t	*rstc	= (at91_rstc_t *) AT91_RSTC_BASE;
		/*
	 * Disable pull-up on:
	 *	RXDV (PC25) => PHY normal mode (not Test mode)
	 * 	ERX0 (PE25) => PHY ADDR0
	 *	ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
	 *
	 * PHY has internal pull-down
	 */

	writel(1 << 25, &pio->pioc.pudr);
	writel((1 << 25) | (1 <<26), &pio->pioe.pudr);

	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;

	/* Need to reset PHY -> 500ms reset */
	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
		AT91_RSTC_MR_URSTEN, &rstc->mr);

	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
	/* Wait for end hardware reset */
	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
		;

	/* Restore NRST value */
	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);

	udelay( 21 * 1000);

	/* Re-enable pull-up */
	writel(1 << 25, &pio->pioc.puer);
	writel((1 << 25) | (1 <<26), &pio->pioe.puer);

	/* Enable clock */
	writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);

	at91_macb_hw_init();

}
#endif

int board_init(void)
{
	/* Enable Ctrlc */
	console_init_f();

	/* arch number of CSB737-Board */
	gd->bd->bi_arch_number = MACH_TYPE_CSB737;

	/* adress of boot parameters */
	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;

	at91_serial_hw_init();
#ifdef CONFIG_CMD_NAND
	csb737_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
	at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_MACB
	csb737_macb_hw_init();
#endif
#ifdef CONFIG_USB_OHCI_NEW
	at91_uhp_hw_init();
#endif
	return 0;
}

int dram_init(void)
{
	gd->bd->bi_dram[0].start = PHYS_SDRAM;
	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
	return 0;
}

#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
}
#endif

int board_eth_init(bd_t *bis)
{
	int rc = 0;
#ifdef CONFIG_MACB
	rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x1F);
#endif
	return rc;
}