From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexey Fisher Subject: Re: [PATCH] drm/i915: fix per-pipe reads after "cleanup" Date: Thu, 17 Feb 2011 23:03:20 +0100 Message-ID: <1297980200.5350.1.camel@zwerg> References: <20110217104053.1a568b5e@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mailout-de.gmx.net (mailout-de.gmx.net [213.165.64.22]) by gabe.freedesktop.org (Postfix) with SMTP id 1EAEC9E78E for ; Thu, 17 Feb 2011 14:03:22 -0800 (PST) In-Reply-To: <20110217104053.1a568b5e@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Am Donnerstag, den 17.02.2011, 10:40 -0800 schrieb Jesse Barnes: > In a few places I replaced reads of per-pipe registers with the actual > register offsets themselves (converting I915_READ(reg) to _PIPE(reg)). > Alexey caught this on his 9xx machine because the cursor control write > was affected. A quick audit showed a few more places where I'd borked > a read, so here's a patch to fix things up. Tested-by: Alexey Fisher > Reported-by: Alexey Fisher > Signed-off-by: Jesse Barnes > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0dc5c6f..eadb4b8 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5291,7 +5291,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) > bool visible = base != 0; > > if (intel_crtc->cursor_visible != visible) { > - uint32_t cntl = CURCNTR(pipe); > + uint32_t cntl = I915_READ(CURCNTR(pipe)); > if (base) { > cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); > cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; > @@ -5661,7 +5661,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc) > struct drm_i915_private *dev_priv = dev->dev_private; > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > int pipe = intel_crtc->pipe; > - u32 dpll = DPLL(pipe); > + u32 dpll = I915_READ(DPLL(pipe)); > u32 fp; > intel_clock_t clock; > > @@ -5749,10 +5749,10 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > int pipe = intel_crtc->pipe; > struct drm_display_mode *mode; > - int htot = HTOTAL(pipe); > - int hsync = HSYNC(pipe); > - int vtot = VTOTAL(pipe); > - int vsync = VSYNC(pipe); > + int htot = I915_READ(HTOTAL(pipe)); > + int hsync = I915_READ(HSYNC(pipe)); > + int vtot = I915_READ(VTOTAL(pipe)); > + int vsync = I915_READ(VSYNC(pipe)); > > mode = kzalloc(sizeof(*mode), GFP_KERNEL); > if (!mode) -- Regards, Alexey