From: john stultz <johnstul@us.ibm.com>
To: Kasper Pedersen <kernel@kasperkp.dk>
Cc: Josh Triplett <josh@joshtriplett.org>,
linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, Peter Zijlstra <a.p.zijlstra@chello.nl>,
Suresh Siddha <suresh.b.siddha@intel.com>
Subject: Re: x86: tsc: v2 make TSC calibration more immune to interrupts
Date: Fri, 22 Apr 2011 18:38:30 -0700 [thread overview]
Message-ID: <1303522710.2796.221.camel@work-vm> (raw)
In-Reply-To: <4DB08987.20403@kasperkp.dk>
On Thu, 2011-04-21 at 21:46 +0200, Kasper Pedersen wrote:
> On 04/21/2011 12:39 AM, Josh Triplett wrote:
> >
> > Have you considered disabling interrupts while calibrating? That would
> > ensure that you only have to care about SMIs, not arbitrary interrupts.
> >
> > Also, on more recent x86 systems you could look at MSR_SMI_COUNT (MSR
> > 0x34) to detect if any SMIs have occurred during the sample period.
> > rdmsr, start sample period, stop sample period, rdmsr, if delta of 0
> > then no SMIs occurred. Exists on Nehalem and newer, at least.
>
>
> I have now tested this, and it is worth doing.
Cool! When you have the chance, send out your latest patch and I'll
review/ack and hopefully queue it for tglx.
thanks
-john
next prev parent reply other threads:[~2011-04-23 1:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-20 18:52 x86: tsc: make TSC calibration more immune to interrupts Kasper Pedersen
2011-04-20 19:15 ` john stultz
2011-04-20 19:44 ` Kasper Pedersen
2011-04-20 20:28 ` john stultz
2011-04-20 21:22 ` x86: tsc: v2 " Kasper Pedersen
2011-04-20 22:39 ` Josh Triplett
2011-04-21 2:19 ` john stultz
2011-04-21 4:32 ` Josh Triplett
2011-04-21 19:46 ` Kasper Pedersen
2011-04-23 1:38 ` john stultz [this message]
2011-04-21 19:52 ` x86: tsc: v3 " Kasper Pedersen
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