From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Herrenschmidt Date: Sat, 23 Apr 2011 23:26:21 +0000 Subject: Re: [PATCH RFC] clk: add support for automatic parent handling Message-Id: <1303601181.2513.132.camel@pasglop> List-Id: References: <1303308457-7501-1-git-send-email-u.kleine-koenig@pengutronix.de> <20110420185922.GD31131@pengutronix.de> <4DAFD5AA.9020404@codeaurora.org> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-arm-kernel@lists.infradead.org On Thu, 2011-04-21 at 12:33 +0200, Thomas Gleixner wrote: > > Depends, there is a lot of sane hardware out there (not necessarily in > the ARM SoC world). We can do with a pointer if the need arises. > > > > optionally a set of common register accessor functions like I did > > > for the generic irq chip. > > > > Again, I don't see the point in having this in the common code. May be I'm > > missing something? > > See my RFC patch of a generic irq chip implementation and how much > duplicated five line inline functions they removed. > > > IMO, a better option instead of the base register and the offsets would be an > > option to have a priv_data pointer. I forgot the exact use case, but we > > thought that would have been helpful when we tried to port the msm clock > > driver in our tree on top of Jeremy's patches. > > It works either way, but we should try to comeup with a sensible > common base struct for sane hardware. Doesn't have to be in the base struct tho. I think a better approach is to keep the base struct reasonably API-only, and have an "implementation" subclass called something like simple_clk for example, that carries those few fields common to most MMIO based implementation and which can be created with existing "helper" code for the most common ones. Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 From: benh@kernel.crashing.org (Benjamin Herrenschmidt) Date: Sun, 24 Apr 2011 09:26:21 +1000 Subject: [PATCH RFC] clk: add support for automatic parent handling In-Reply-To: References: <1303308457-7501-1-git-send-email-u.kleine-koenig@pengutronix.de> <20110420185922.GD31131@pengutronix.de> <4DAFD5AA.9020404@codeaurora.org> Message-ID: <1303601181.2513.132.camel@pasglop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, 2011-04-21 at 12:33 +0200, Thomas Gleixner wrote: > > Depends, there is a lot of sane hardware out there (not necessarily in > the ARM SoC world). We can do with a pointer if the need arises. > > > > optionally a set of common register accessor functions like I did > > > for the generic irq chip. > > > > Again, I don't see the point in having this in the common code. May be I'm > > missing something? > > See my RFC patch of a generic irq chip implementation and how much > duplicated five line inline functions they removed. > > > IMO, a better option instead of the base register and the offsets would be an > > option to have a priv_data pointer. I forgot the exact use case, but we > > thought that would have been helpful when we tried to port the msm clock > > driver in our tree on top of Jeremy's patches. > > It works either way, but we should try to comeup with a sensible > common base struct for sane hardware. Doesn't have to be in the base struct tho. I think a better approach is to keep the base struct reasonably API-only, and have an "implementation" subclass called something like simple_clk for example, that carries those few fields common to most MMIO based implementation and which can be created with existing "helper" code for the most common ones. Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757275Ab1DWX1j (ORCPT ); Sat, 23 Apr 2011 19:27:39 -0400 Received: from gate.crashing.org ([63.228.1.57]:51196 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751230Ab1DWX1g (ORCPT ); Sat, 23 Apr 2011 19:27:36 -0400 Subject: Re: [PATCH RFC] clk: add support for automatic parent handling From: Benjamin Herrenschmidt To: Thomas Gleixner Cc: Saravana Kannan , Paul McKenney , Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= , linux-arm-kernel@lists.infradead.org, Sascha Hauer , Stephen Boyd , Jeremy Kerr , kernel@pengutronix.de, linux-kernel , Ben Dooks , Linus Torvalds , Arnd Bergmann , Paul Mundt , linux-sh In-Reply-To: References: <1303308457-7501-1-git-send-email-u.kleine-koenig@pengutronix.de> <20110420185922.GD31131@pengutronix.de> <4DAFD5AA.9020404@codeaurora.org> Content-Type: text/plain; charset="UTF-8" Date: Sun, 24 Apr 2011 09:26:21 +1000 Message-ID: <1303601181.2513.132.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2011-04-21 at 12:33 +0200, Thomas Gleixner wrote: > > Depends, there is a lot of sane hardware out there (not necessarily in > the ARM SoC world). We can do with a pointer if the need arises. > > > > optionally a set of common register accessor functions like I did > > > for the generic irq chip. > > > > Again, I don't see the point in having this in the common code. May be I'm > > missing something? > > See my RFC patch of a generic irq chip implementation and how much > duplicated five line inline functions they removed. > > > IMO, a better option instead of the base register and the offsets would be an > > option to have a priv_data pointer. I forgot the exact use case, but we > > thought that would have been helpful when we tried to port the msm clock > > driver in our tree on top of Jeremy's patches. > > It works either way, but we should try to comeup with a sensible > common base struct for sane hardware. Doesn't have to be in the base struct tho. I think a better approach is to keep the base struct reasonably API-only, and have an "implementation" subclass called something like simple_clk for example, that carries those few fields common to most MMIO based implementation and which can be created with existing "helper" code for the most common ones. Ben.