From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <corsac@debian.org>
Received: from molly.corsac.net (molly.corsac.net [IPv6:2002:4ec0:442e::1])
 (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits))
 (No client certificate requested)
 by mail.saout.de (Postfix) with ESMTPS
 for <dm-crypt@saout.de>; Thu, 19 May 2011 10:01:52 +0200 (CEST)
From: Yves-Alexis Perez <corsac@debian.org>
In-Reply-To: <4DD4C126.3030709@redhat.com>
References: <20110518152417.15529442@Haruhi.lan.labor-bochum.net>
 <1305755598.15947.2.camel@hidalgo>  <4DD4C126.3030709@redhat.com>
Content-Type: text/plain; charset="utf-8"
Date: Thu, 19 May 2011 10:01:50 +0200
Message-ID: <1305792110.9280.4.camel@oban>
Mime-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: Re: [dm-crypt] DM-Crypt resistance against Cold Boot Attacks
List-Id: <dm-crypt.saout.de>
List-Unsubscribe: <http://www.saout.de/mailman/options/dm-crypt>,
 <mailto:dm-crypt-request@saout.de?subject=unsubscribe>
List-Archive: <http://www.saout.de/pipermail/dm-crypt>
List-Post: <mailto:dm-crypt@saout.de>
List-Help: <mailto:dm-crypt-request@saout.de?subject=help>
List-Subscribe: <http://www.saout.de/mailman/listinfo/dm-crypt>,
 <mailto:dm-crypt-request@saout.de?subject=subscribe>
To: Milan Broz <mbroz@redhat.com>
Cc: dm-crypt@saout.de

On jeu., 2011-05-19 at 09:05 +0200, Milan Broz wrote:
> On 05/18/2011 11:53 PM, Yves-Alexis Perez wrote:
> > If you read the paper, you'll noticed there's nothing to change to
> > dm-crypt, as the cypher is registered in the Crypto-API, it can be used
> > directly.
> 
> TBH dmcrypt keeps its own copy of key (because key it is still part
> of the device-mapper mapping table so it must be available for
> status commands).

In that case it'll be the “dummy” key.
> 
> So there are some changes needed but basically technicaly unrelated
> to that patch.
> (This will hopefully change with new mapping table format soon.)

Needed for what?
> 
> Anyway, it must be accepted into kernel crypto layer first.

I'm not even sure it'll be submitted though.
> 
> IMHO I think that without strong hw support these implementation
> will have some problems but it is good that someone works on such
> things.
> (E.g. how it works if it is not bare hw but virtualized system?)

For the AES-NI one, if the hypervisor supports it (they tested on KVM)
yes (though the vm registers are stored in the host ram anyway).

If you're interested, I found that the two papers were quite clear and
quick to read, so it might be a good idea to read them.

Regards,
-- 
Yves-Alexis