[U-Boot] [PATCH] mxc_spi: Round up clock divider

["Benoît Thébaudeau" <benoit.thebaudeau@advansee.com>]

Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c u-boot-4d3c95f/drivers/spi/mxc_spi.c
index 2e15318..cf1462f 100644
--- u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
+++ u-boot-4d3c95f/drivers/spi/mxc_spi.c
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
 	debug("clk %d Hz, div %d, real clk %d Hz\n",
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
 		if (pre_div > 16) {
 			post_div = pre_div / 16;
 			pre_div = 15;