From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Date: Mon, 31 Oct 2011 13:30:43 -0500 Subject: [U-Boot] [PATCH 3/5] powerpc/85xx: add some missing sync instructions in the CCSR relocation code In-Reply-To: <1320085845-10547-1-git-send-email-timur@freescale.com> References: <1320085845-10547-1-git-send-email-timur@freescale.com> Message-ID: <1320085845-10547-3-git-send-email-timur@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Calls to tlbwe and tlbsx should be preceded with an isync/msync pair. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/start.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index b5bf1fa..ccb331a 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -363,6 +363,8 @@ purge_old_ccsr_tlb: li r1, 0 mtspr MAS6, r1 /* Search the current address space and PID */ + isync + msync tlbsx 0, r8 mfspr r1, MAS1 andis. r2, r1, MAS1_VALID at h /* Check for the Valid bit */ @@ -370,6 +372,8 @@ purge_old_ccsr_tlb: rlwinm r1, r1, 0, 1, 31 /* Clear Valid bit */ mtspr MAS1, r1 + isync + msync tlbwe 1: -- 1.7.3.4