From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Que Subject: [PATCH 1/2] drivers: i915: Fix BLC PWM register setup Date: Thu, 10 Nov 2011 17:50:26 -0800 Message-ID: <1320976227-21262-1-git-send-email-sque@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-gx0-f201.google.com (mail-gx0-f201.google.com [209.85.161.201]) by gabe.freedesktop.org (Postfix) with ESMTP id A7CF8A0CEA for ; Thu, 10 Nov 2011 17:50:39 -0800 (PST) Received: by ggnq2 with SMTP id q2so102222ggn.0 for ; Thu, 10 Nov 2011 17:50:39 -0800 (PST) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org, jbarnes@virtuousgeek.org, chris@chris-wilson.co.uk, mjg59@srcf.ucam.org Cc: olofj@chromium.org, Simon Que , snanda@chromium.org List-Id: intel-gfx@lists.freedesktop.org There is an error in i915_read_blc_pwm_ctl, where the register values are not being copied correctly. BLC_PWM_CTL and BLC_PWM_CTL2 are getting mixed up. This patch fixes that so that saveBLC_PWM_CTL2 and not saveBLC_PWM_CTL is copied to the BLC_PWM_CTL2 register. Signed-off-by: Simon Que --- drivers/gpu/drm/i915/intel_panel.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index a9e0c7b..f15388c 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -141,8 +141,8 @@ static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) dev_priv->saveBLC_PWM_CTL2 = val; } else if (val == 0) { I915_WRITE(BLC_PWM_PCH_CTL2, - dev_priv->saveBLC_PWM_CTL); - val = dev_priv->saveBLC_PWM_CTL; + dev_priv->saveBLC_PWM_CTL2); + val = dev_priv->saveBLC_PWM_CTL2; } } else { val = I915_READ(BLC_PWM_CTL); -- 1.7.3.1