From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julian Stecklina Subject: [PATCH] Allow aligned byte and word writes to IOAPIC registers. Date: Tue, 22 Nov 2011 17:09:25 +0100 Message-ID: <1321978165.16507.33.camel@tabernacle.lan> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit To: KVM devel mailing list Return-path: Received: from mail.skyhub.de ([78.46.96.112]:55874 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755051Ab1KVQJ2 (ORCPT ); Tue, 22 Nov 2011 11:09:28 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTP id 0BABA1DA159 for ; Tue, 22 Nov 2011 17:09:26 +0100 (CET) Received: from mail.skyhub.de ([127.0.0.1]) by localhost (door.skyhub.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id byFevA02vR36 for ; Tue, 22 Nov 2011 17:09:25 +0100 (CET) Received: from [141.76.49.29] (unknown [141.76.49.29]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id AE20F1D99B0 for ; Tue, 22 Nov 2011 17:09:25 +0100 (CET) Sender: kvm-owner@vger.kernel.org List-ID: This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write consistent with ioapic_mmio_read, which also allows byte and word accesses. Signed-off-by: Julian Stecklina --- virt/kvm/ioapic.c | 17 +++++++++++++---- 1 files changed, 13 insertions(+), 4 deletions(-) diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c index 3eed61e..e94ef6ba 100644 --- a/virt/kvm/ioapic.c +++ b/virt/kvm/ioapic.c @@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len, (void*)addr, len, val); ASSERT(!(addr & 0xf)); /* check alignment */ - if (len == 4 || len == 8) - data = *(u32 *) val; - else { + switch (len) { + case 8: + case 4: + data = *(u32 *) val; + break; + case 2: + data = *(u16 *) val; + break; + case 1: + data = *(u8 *) val; + break; + default: printk(KERN_WARNING "ioapic: Unsupported size %d\n", len); return 0; } @@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len, spin_lock(&ioapic->lock); switch (addr) { case IOAPIC_REG_SELECT: - ioapic->ioregsel = data; + ioapic->ioregsel = data & 0xFF; /* 8-bit register */ break; case IOAPIC_REG_WINDOW: -- 1.7.7.3