diff for duplicates of <13233016.uLZWGnKmhe@diego> diff --git a/a/1.txt b/N1/1.txt index f2d0f3a..6fdeb8c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -Am Montag, 27. M?rz 2023, 18:49:24 CEST schrieb Andy Chiu: +Am Montag, 27. März 2023, 18:49:24 CEST schrieb Andy Chiu: > From: Greentime Hu <greentime.hu@sifive.com> > > clear vector registers on boot if kernel supports V. @@ -10,3 +10,10 @@ Am Montag, 27. M?rz 2023, 18:49:24 CEST schrieb Andy Chiu: Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu> + + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index ec04fe5..4ece331 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,12 +1,29 @@ "ref\020230327164941.20491-1-andy.chiu@sifive.com\0" "ref\020230327164941.20491-5-andy.chiu@sifive.com\0" "From\0Heiko St\303\274bner <heiko@sntech.de>\0" - "Subject\0[PATCH -next v17 04/20] riscv: Clear vector regfile on bootup\0" + "Subject\0Re: [PATCH -next v17 04/20] riscv: Clear vector regfile on bootup\0" "Date\0Fri, 31 Mar 2023 12:53:24 +0200\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0linux-riscv@lists.infradead.org" + palmer@dabbelt.com + anup@brainfault.org + atishp@atishpatra.org + kvm-riscv@lists.infradead.org + " kvm@vger.kernel.org\0" + "Cc\0vineetg@rivosinc.com" + greentime.hu@sifive.com + guoren@linux.alibaba.com + Andy Chiu <andy.chiu@sifive.com> + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Vincent Chen <vincent.chen@sifive.com> + Conor Dooley <conor.dooley@microchip.com> + Masahiro Yamada <masahiroy@kernel.org> + Guo Ren <guoren@kernel.org> + Alexandre Ghiti <alexandre.ghiti@canonical.com> + " Andy Chiu <andy.chiu@sifive.com>\0" "\00:1\0" "b\0" - "Am Montag, 27. M?rz 2023, 18:49:24 CEST schrieb Andy Chiu:\n" + "Am Montag, 27. M\303\244rz 2023, 18:49:24 CEST schrieb Andy Chiu:\n" "> From: Greentime Hu <greentime.hu@sifive.com>\n" "> \n" "> clear vector registers on boot if kernel supports V.\n" @@ -17,6 +34,13 @@ "> Acked-by: Conor Dooley <conor.dooley@microchip.com>\n" "\n" "Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>\n" - Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu> + "Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>\n" + "\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -7642ed177f1db22e93d94162eb77d7527f22201c94ba737b1991ce1d16d0420f +14dbcf8dcbc6ba626c109e65c436abe653b0a1cffdfc84160c5426065b2ba8db
diff --git a/a/1.txt b/N2/1.txt index f2d0f3a..8819a79 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,4 +1,4 @@ -Am Montag, 27. M?rz 2023, 18:49:24 CEST schrieb Andy Chiu: +Am Montag, 27. März 2023, 18:49:24 CEST schrieb Andy Chiu: > From: Greentime Hu <greentime.hu@sifive.com> > > clear vector registers on boot if kernel supports V. diff --git a/a/content_digest b/N2/content_digest index ec04fe5..8e3eb70 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,12 +1,29 @@ "ref\020230327164941.20491-1-andy.chiu@sifive.com\0" "ref\020230327164941.20491-5-andy.chiu@sifive.com\0" "From\0Heiko St\303\274bner <heiko@sntech.de>\0" - "Subject\0[PATCH -next v17 04/20] riscv: Clear vector regfile on bootup\0" + "Subject\0Re: [PATCH -next v17 04/20] riscv: Clear vector regfile on bootup\0" "Date\0Fri, 31 Mar 2023 12:53:24 +0200\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0linux-riscv@lists.infradead.org" + palmer@dabbelt.com + anup@brainfault.org + atishp@atishpatra.org + kvm-riscv@lists.infradead.org + " kvm@vger.kernel.org\0" + "Cc\0vineetg@rivosinc.com" + greentime.hu@sifive.com + guoren@linux.alibaba.com + Andy Chiu <andy.chiu@sifive.com> + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Vincent Chen <vincent.chen@sifive.com> + Conor Dooley <conor.dooley@microchip.com> + Masahiro Yamada <masahiroy@kernel.org> + Guo Ren <guoren@kernel.org> + Alexandre Ghiti <alexandre.ghiti@canonical.com> + " Andy Chiu <andy.chiu@sifive.com>\0" "\00:1\0" "b\0" - "Am Montag, 27. M?rz 2023, 18:49:24 CEST schrieb Andy Chiu:\n" + "Am Montag, 27. M\303\244rz 2023, 18:49:24 CEST schrieb Andy Chiu:\n" "> From: Greentime Hu <greentime.hu@sifive.com>\n" "> \n" "> clear vector registers on boot if kernel supports V.\n" @@ -19,4 +36,4 @@ "Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>\n" Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu> -7642ed177f1db22e93d94162eb77d7527f22201c94ba737b1991ce1d16d0420f +60c601a729f8915aa021a412c4ff4b0df8badb9603973911f2005741e5bd7e1b
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