From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joe Shmo Subject: Help with SPI node Date: Thu, 1 Oct 2009 09:19:49 -0700 (PDT) Message-ID: <132676.44242.qm@web30102.mail.mud.yahoo.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============5510591180539265612==" Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org List-Id: devicetree@vger.kernel.org --===============5510591180539265612== Content-Type: multipart/alternative; boundary="0-1869651894-1254413989=:44242" --0-1869651894-1254413989=:44242 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable =A0 =A0I'm attempting to get SPI to work on my embedded design =A0that is based on the mpc8313erbd reference board wiht a =A02.6.27 kernel.=A0 I cannot open the SPI device.=A0 =A0Tracing through the kernel code, it looks like the device is =A0not being found in the DTB file.=A0 However there is a =A0SPI node in there already described.=A0 Our boards is a =A0SPI master, and the device we will attach is a SPI =A0slave.=A0 Could someone elaborate on what is needed in =A0the DTS file to have our SPI driver work and respond to an =A0open() call? =A0 =A0I've attached our latest attempt at modifying the DTS =A0file. =A0 =A0 =A0 > /* > * MPC8313E RDB Device Tree Source > * > * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. > * > * This program is free software; you can > redistribute=A0 it and/or modify it > * under=A0 the terms of=A0 the GNU General=A0 > Public License as published by the > * Free Software Foundation;=A0 either version 2 of > the=A0 License, or (at your > * option) any later version. > */ > /dts-v1/; > / { > model =3D "MPC8313ERDB"; > compatible =3D "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; > #address-cells =3D <1>; > #size-cells =3D <1>; > aliases { > =A0 ethernet0 =3D &enet0; > =A0 ethernet1 =3D &enet1; > =A0 serial0 =3D &serial0; > =A0 serial1 =3D &serial1; > =A0 pci0 =3D &pci0; > }; > cpus { > =A0 #address-cells =3D <1>; > =A0 #size-cells =3D <0>; > =A0 PowerPC,8313@0 { > =A0=A0=A0device_type =3D "cpu"; > =A0=A0=A0reg =3D <0x0>; > =A0=A0=A0d-cache-line-size =3D <32>; > =A0=A0=A0i-cache-line-size =3D <32>; > =A0=A0=A0d-cache-size =3D <16384>; > =A0=A0=A0i-cache-size =3D <16384>; > =A0=A0=A0timebase-frequency =3D <0>; // from > bootloader > =A0=A0=A0bus-frequency =3D <0>;=A0 // from > bootloader > =A0=A0=A0clock-frequency =3D <0>;=A0 // > from bootloader > =A0 }; > }; > memory { > =A0 device_type =3D "memory"; > =A0 reg =3D <0x00000000 0x08000000>; // 128MB at 0 > }; > localbus@e0005000 { > =A0 #address-cells =3D <2>; > =A0 #size-cells =3D <1>; > =A0 compatible =3D "fsl,mpc8313-elbc", "fsl,elbc", > "simple-bus"; > =A0 reg =3D <0xe0005000 0x1000>; > =A0 interrupts =3D <77 0x8>; > =A0 interrupt-parent =3D <&ipic>; > =A0 // CS0 and CS1 are swapped when > =A0 // booting from nand, but the > =A0 // addresses are the same. > =A0 ranges =3D <0x0 0x0 0xfe000000 0x00200000 > =A0 =A0 =A0 =A0 =A0 =A0 0x1 0x0 > 0xc0000000 0x02000000 > =A0 =A0 =A0 =A0 =A0 =A0 0x2 0x0 > 0xf0000000 0x00020000 > =A0 =A0 =A0 =A0 =A0 =A0 0x3 0x0 > 0xfa000000 0x00008000>; > =A0 /* remapped for our part */ > =A0 flash@0,0 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0compatible =3D "cfi-flash"; > =A0=A0=A0reg =3D <0x0 0x0 0x200000>; > =A0=A0=A0bank-width =3D <2>; > =A0=A0=A0device-width =3D <1>; > =A0=A0=A0 > =A0=A0=A0u-boot@0 { > =A0 =A0 reg =3D <0x0 0x40000>; > =A0=A0=A0}; > =A0=A0=A0u-boot-env@40000 { > =A0 =A0 reg =3D <0x40000 0x10000>; > =A0=A0=A0}; > =A0=A0=A0kernel@50000 { > =A0 =A0 reg =3D <0x50000 0x1A0000>; > =A0=A0=A0}; > =A0=A0=A0dtb@1F0000 { > =A0 =A0 reg =3D <0x1f0000 0x10000>; > =A0=A0=A0}; > =A0 }; > =A0 /* DCC - remapped for our part */ > =A0 nand@1,0 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0compatible =3D "fsl,mpc8313-fcm-nand", > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 > "fsl,elbc-fcm-nand"; > =A0=A0=A0reg =3D <0x1 0x0 0x02000000>; > =A0=A0=A0fs1@0 { > =A0 =A0 reg =3D <0x0 0x10000000>; > =A0=A0=A0}; > =A0=A0=A0fs2@10000000 { > =A0 =A0 reg =3D <0x10000000 0x10000000>; > =A0=A0=A0}; > =A0 }; > }; > soc8313@e0000000 { > =A0 #address-cells =3D <1>; > =A0 #size-cells =3D <1>; > =A0 device_type =3D "soc"; > =A0 compatible =3D "simple-bus"; > =A0 ranges =3D <0x0 0xe0000000 0x00100000>; > =A0 reg =3D <0xe0000000 0x00000200>; > =A0 bus-frequency =3D <0>; > =A0 wdt@200 { > =A0=A0=A0device_type =3D "watchdog"; > =A0=A0=A0compatible =3D "mpc83xx_wdt"; > =A0=A0=A0reg =3D <0x200 0x100>; > =A0 }; > =A0 /* > =A0 *=A0 FPGA-TNG device > =A0 * used 4 external interrupts > =A0 * IRQ0=A0 - magnetec stripe image writer/reader > =A0 * IRQ1=A0 - picture image writer > =A0 * IRQ2=A0 - RFID reader=A0 - > =A0 * IRQ3 - MiniPCI? > =A0 * IRQ4 - motion devices > =A0 */ > =A0 fpga-tng@f0000000 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0compatible =3D "fpga-tng"; > =A0=A0=A0ranges; > =A0=A0=A0/* IRQ 0 level */ > =A0=A0=A0magstripe@00 { > =A0 =A0 device_type =3D "magstripe"; > =A0 =A0 compatible =3D "ms_tng"; > =A0 =A0 reg =3D <0x00 0x4>; > =A0 =A0 interrupts =3D <48 0x8>; > =A0 =A0 interrupt-parent =3D < &ipic >; > =A0=A0=A0}; > =A0=A0=A0/* IRQ 1 level */ > =A0=A0=A0tph@5e { > =A0 =A0 device_type =3D "tph"; > =A0 =A0 compatible =3D "tph_tng"; > =A0 =A0 reg =3D <0x5e 0x4>; > =A0 =A0 interrupts =3D <17 0x8>; > =A0 =A0 interrupt-parent =3D < &ipic >; > =A0=A0=A0}; > =A0=A0=A0motion@8e { > =A0 =A0 device_type =3D "motion"; > =A0 =A0 compatible =3D "motion_tng"; > =A0 =A0 reg =3D <0x8e 0x4>; > =A0 =A0 interrupts =3D <20 0x8>; > =A0 =A0 interrupt-parent =3D < &ipic >; > =A0=A0=A0}; > =A0 }; > =A0 sleep-nexus { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0compatible =3D "simple-bus"; > =A0=A0=A0sleep =3D <&pmc 0x03000000>; > =A0=A0=A0ranges; > =A0=A0=A0pit@400 { > =A0 =A0 device_type =3D "pit"; > =A0 =A0 compatible =3D "mpc_pit"; > =A0 =A0 reg =3D <0x400 0x100>; > =A0 =A0 interrupts =3D <65 0x8>; > =A0 =A0 interrupt-parent =3D < &ipic >; > =A0 =A0 clock-frequency =3D <133333330>; > =A0=A0=A0}; > =A0=A0=A0i2c@3000 { > =A0 =A0 #address-cells =3D <1>; > =A0 =A0 #size-cells =3D <0>; > =A0 =A0 cell-index =3D <0>; > =A0 =A0 compatible =3D "fsl-i2c"; > =A0 =A0 reg =3D <0x3000 0x100>; > =A0 =A0 interrupts =3D <14 0x8>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 dfsrr; > =A0 =A0 sensor@48 { > =A0 =A0=A0=A0compatible =3D "national,lm75"; > =A0 =A0=A0=A0reg =3D <0x48>; > =A0 =A0 }; > =A0 =A0 rtc@68 { > =A0 =A0=A0=A0compatible =3D "dallas,ds1339"; > =A0 =A0=A0=A0reg =3D <0x68>; > =A0 =A0 }; > =A0 =A0 =A0=A0=A0 > =A0=A0=A0}; > =A0=A0=A0spi@7000 { > =A0 =A0 device_type =3D "spi"; > =A0 =A0 cell-index =3D <0>; > =A0 =A0 compatible =3D > "fsl,spi","fsl,mpc83xx-spi","fsl,mpc83xx_spi"; > =A0 =A0 reg =3D <0x7000 0x1000>; > =A0 =A0 interrupts =3D <21 0x8>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 mode =3D "cpu"; > =A0 =A0=20 > =A0 =A0 fsl_m25p80@0 { > =A0 =A0=A0=A0compatible =3D "fsl,spi"; > =A0 =A0=A0=A0reg =3D <0>; > =A0 =A0=A0=A0voltage-ranges =3D <3300 > 3300>; > =A0 =A0=A0=A0spi-max-frequency =3D > <6000000>; > =A0 =A0 };=A0=20 > =A0=A0=A0};=20 > =A0=A0=A0crypto@30000 { > =A0 =A0 compatible =3D "fsl,sec2.2", "fsl,sec2.1", > =A0 =A0 =A0 =A0 =A0 =A0 =A0 > =A0=A0=A0"fsl,sec2.0"; > =A0 =A0 reg =3D <0x30000 0x10000>; > =A0 =A0 interrupts =3D <11 0x8>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 fsl,num-channels =3D <1>; > =A0 =A0 fsl,channel-fifo-len =3D <24>; > =A0 =A0 fsl,exec-units-mask =3D <0x4c>; > =A0 =A0 fsl,descriptor-types-mask =3D > <0x0122003f>; > =A0=A0=A0}; > =A0 }; > =A0 i2c@3100 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <0>; > =A0=A0=A0cell-index =3D <1>; > =A0=A0=A0compatible =3D "fsl-i2c"; > =A0=A0=A0reg =3D <0x3100 0x100>; > =A0=A0=A0interrupts =3D <15 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0dfsrr; > =A0 }; > =A0 spi@7000 { > =A0=A0=A0device_type =3D "spi"; > =A0=A0=A0cell-index =3D <0>; > =A0=A0=A0compatible =3D > "fsl,spi","fsl,mpc83xx_spi"; > =A0=A0=A0reg =3D <0x7000 0x1000>; > =A0=A0=A0interrupts =3D <16 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0mode =3D "cpu"; > =A0=A0=A0 > =A0=A0=A0mp85p20@0 { > =A0 =A0=A0=A0compatible =3D "fsl,spi"; > =A0 =A0=A0=A0reg =3D <0>; > =A0 =A0=A0=A0voltage-ranges =3D <3300 > 3300>; > =A0 =A0=A0=A0spi-max-frequency =3D > <6000000>; > =A0=A0=A0};=A0 =A0=20 > =A0 }; > =A0 dma@82a8 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0compatible =3D "fsl,mpc8313-dma", > "fsl,elo-dma"; > =A0=A0=A0reg =3D <0x82a8 4>; > =A0=A0=A0ranges =3D <0 0x8100 0x1a8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0interrupts =3D <71 8>; > =A0=A0=A0cell-index =3D <0>; > =A0=A0=A0dma-channel@0 { > =A0 =A0 compatible =3D "fsl,mpc8313-dma-channel", > "fsl,elo-dma-channel"; > =A0 =A0 reg =3D <0 0x80>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 interrupts =3D <71 8>; > =A0=A0=A0}; > =A0=A0=A0dma-channel@80 { > =A0 =A0 compatible =3D "fsl,mpc8313-dma-channel", > "fsl,elo-dma-channel"; > =A0 =A0 reg =3D <0x80 0x80>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 interrupts =3D <71 8>; > =A0=A0=A0}; > =A0=A0=A0dma-channel@100 { > =A0 =A0 compatible =3D "fsl,mpc8313-dma-channel", > "fsl,elo-dma-channel"; > =A0 =A0 reg =3D <0x100 0x80>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 interrupts =3D <71 8>; > =A0=A0=A0}; > =A0=A0=A0dma-channel@180 { > =A0 =A0 compatible =3D "fsl,mpc8313-dma-channel", > "fsl,elo-dma-channel"; > =A0 =A0 reg =3D <0x180 0x28>; > =A0 =A0 interrupt-parent =3D <&ipic>; > =A0 =A0 interrupts =3D <71 8>; > =A0=A0=A0}; > =A0 }; > =A0 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ > =A0 usb@23000 { > =A0=A0=A0compatible =3D "fsl-usb2-dr"; > =A0=A0=A0reg =3D <0x23000 0x1000>; > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <0>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0interrupts =3D <38 0x8>; > =A0=A0=A0phy_type =3D "utmi_wide"; > =A0=A0=A0dr_mode =3D "peripheral"; > =A0=A0=A0sleep =3D <&pmc 0x00300000>; > =A0 }; > =A0 enet0: ethernet@24000 { > =A0=A0=A0#address-cells =3D <1>; > =A0=A0=A0#size-cells =3D <1>; > =A0=A0=A0sleep =3D <&pmc 0x20000000>; > =A0=A0=A0ranges; > =A0=A0=A0cell-index =3D <0>; > =A0=A0=A0device_type =3D "network"; > =A0=A0=A0model =3D "eTSEC"; > =A0=A0=A0compatible =3D "gianfar", "simple-bus"; > =A0=A0=A0reg =3D <0x24000 0x1000>; > =A0=A0=A0local-mac-address =3D [ 00 00 00 00 00 00 > ]; > =A0=A0=A0interrupts =3D <32 0x8 33 0x8 34 > 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0phy-handle =3D < &phy3 >; > =A0=A0=A0fsl,magic-packet; > =A0=A0=A0mdio@24520 { > =A0 =A0 #address-cells =3D <1>; > =A0 =A0 #size-cells =3D <0>; > =A0 =A0 compatible =3D "fsl,gianfar-mdio"; > =A0 =A0 reg =3D <0x24520 0x20>; > =A0 =A0 phy3: ethernet-phy@3 { > =A0 =A0=A0=A0interrupt-parent =3D > <&ipic>; > =A0 =A0=A0=A0reg =3D <0x3>; > =A0 =A0=A0=A0device_type =3D "ethernet-phy"; > =A0 =A0 }; > =A0 =A0 phy1: ethernet-phy@1 { > =A0 =A0=A0=A0interrupt-parent =3D > <&ipic>; > =A0 =A0=A0=A0reg =3D <0x1>; > =A0 =A0=A0=A0device_type =3D "ethernet-phy"; > =A0 =A0 }; > =A0=A0=A0}; > =A0 }; > =A0 enet1: ethernet@25000 { > =A0=A0=A0cell-index =3D <1>; > =A0=A0=A0device_type =3D "network"; > =A0=A0=A0model =3D "eTSEC"; > =A0=A0=A0compatible =3D "gianfar"; > =A0=A0=A0reg =3D <0x25000 0x1000>; > =A0=A0=A0local-mac-address =3D [ 00 00 00 00 00 00 > ]; > =A0=A0=A0interrupts =3D <35 0x8 36 0x8 37 > 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0phy-handle =3D < &phy1 >; > =A0=A0=A0sleep =3D <&pmc 0x10000000>; > =A0=A0=A0fsl,magic-packet; > =A0 }; > =A0 serial0: serial@4500 { > =A0=A0=A0cell-index =3D <0>; > =A0=A0=A0device_type =3D "serial"; > =A0=A0=A0compatible =3D "ns16550"; > =A0=A0=A0reg =3D <0x4500 0x100>; > =A0=A0=A0clock-frequency =3D <0>; > =A0=A0=A0interrupts =3D <9 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0 }; > =A0 serial1: serial@4600 { > =A0=A0=A0cell-index =3D <1>; > =A0=A0=A0device_type =3D "serial"; > =A0=A0=A0compatible =3D "ns16550"; > =A0=A0=A0reg =3D <0x4600 0x100>; > =A0=A0=A0clock-frequency =3D <0>; > =A0=A0=A0interrupts =3D <10 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0 }; > =A0 /* IPIC > =A0=A0=A0* interrupts cell =3D sense> > =A0=A0=A0* sense values match linux > IORESOURCE_IRQ_* defines: > =A0=A0=A0* sense =3D=3D 8: Level, low assertion > =A0=A0=A0* sense =3D=3D 2: Edge, high-to-low change > =A0=A0=A0*/ > =A0 ipic: pic@700 { > =A0=A0=A0interrupt-controller; > =A0=A0=A0#address-cells =3D <0>; > =A0=A0=A0#interrupt-cells =3D <2>; > =A0=A0=A0reg =3D <0x700 0x100>; > =A0=A0=A0device_type =3D "ipic"; > =A0 }; > =A0 pmc: power@b00 { > =A0=A0=A0compatible =3D "fsl,mpc8313-pmc", > "fsl,mpc8349-pmc"; > =A0=A0=A0reg =3D <0xb00 0x100 0xa00 0x100>; > =A0=A0=A0interrupts =3D <80 8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0fsl,mpc8313-wakeup-timer =3D > <>m1>; > =A0=A0=A0/* Remove this (or change to "okay") if > you have > =A0 =A0 * a REVA3 or later board, if you apply one of > the > =A0 =A0 * workarounds listed in section 8.5 of the > board > =A0 =A0 * manual, or if you are adapting this device > tree > =A0 =A0 * to a different board. > =A0 =A0 */ > =A0=A0=A0status =3D "fail"; > =A0 }; > =A0 gtm1: timer@500 { > =A0=A0=A0compatible =3D "fsl,mpc8313-gtm", > "fsl,gtm"; > =A0=A0=A0reg =3D <0x500 0x100>; > =A0=A0=A0interrupts =3D <90 8 78 8 84 8 72 > 8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0 }; > =A0 timer@600 { > =A0=A0=A0compatible =3D "fsl,mpc8313-gtm", > "fsl,gtm"; > =A0=A0=A0reg =3D <0x600 0x100>; > =A0=A0=A0interrupts =3D <91 8 79 8 85 8 73 > 8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0 }; > }; > sleep-nexus { > =A0 #address-cells =3D <1>; > =A0 #size-cells =3D <1>; > =A0 compatible =3D "simple-bus"; > =A0 sleep =3D <&pmc 0x00010000>; > =A0 ranges; > =A0 pci0: pci@e0008500 { > =A0=A0=A0cell-index =3D <1>; > =A0=A0=A0interrupt-map-mask =3D <0xf800 0x0 0x0 > 0x7>; > =A0=A0=A0interrupt-map =3D < > =A0 =A0=A0=A0/* IDSEL 0x0E -mini PCI */ > =A0 =A0 =A0 0x7000 0x0 0x0 0x1 &ipic 18 0x8 > =A0 =A0 =A0 0x7000 0x0 0x0 0x2 &ipic 18 0x8 > =A0 =A0 =A0 0x7000 0x0 0x0 0x3 &ipic 18 0x8 > =A0 =A0 =A0 0x7000 0x0 0x0 0x4 &ipic 18 0x8 > =A0 =A0=A0=A0/* IDSEL 0x0F - PCI slot */ > =A0 =A0 =A0 0x7800 0x0 0x0 0x1 &ipic 17 0x8 > =A0 =A0 =A0 0x7800 0x0 0x0 0x2 &ipic 18 0x8 > =A0 =A0 =A0 0x7800 0x0 0x0 0x3 &ipic 17 0x8 > =A0 =A0 =A0 0x7800 0x0 0x0 0x4 &ipic 18 > 0x8>; > =A0=A0=A0interrupt-parent =3D <&ipic>; > =A0=A0=A0interrupts =3D <66 0x8>; > =A0=A0=A0bus-range =3D <0x0 0x0>; > =A0=A0=A0ranges =3D <0x02000000 0x0 0x90000000 > 0x90000000 0x0 0x10000000 > =A0 =A0 =A0 0x42000000 0x0 0x80000000 0x80000000 > 0x0 0x10000000 > =A0 =A0 =A0 0x01000000 0x0 0x00000000 0xe2000000 > 0x0 0x00100000>; > =A0=A0=A0clock-frequency =3D <66666666>; > =A0=A0=A0#interrupt-cells =3D <1>; > =A0=A0=A0#size-cells =3D <2>; > =A0=A0=A0#address-cells =3D <3>; > =A0=A0=A0reg =3D <0xe0008500 0x100>; > =A0=A0=A0compatible =3D "fsl,mpc8349-pci"; > =A0=A0=A0device_type =3D "pci"; > =A0 }; > }; > }; >=20 >=20 >=20 > =A0 =A0 =A0=20 > =0A=0A=0A --0-1869651894-1254413989=:44242 Content-Type: text/html; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable


 
 I'm attempting to get= SPI to work on my embedded design
 that is based on the mpc8313erb= d reference board wiht a
 2.6.27 kernel.  I cannot open the SP= I device. 
 Tracing through the kernel code, it looks like the= device is
 not being found in the DTB file.  However there is= a
 SPI node in there already described.  Our boards is a
&= nbsp;SPI master, and the device we will attach is a SPI
 slave.&nbs= p; Could someone elaborate on what is needed in
 the DTS file to ha= ve our SPI driver work and respond to an
 open() call?
  I've attached our latest attempt at modifying the DTS
 file.=
 
 
 
> /*
> * MPC8313E RDB Device Tr= ee Source
> *
> * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
> *
> * This program is free software; yo= u can
> redistribute  it and/or modify it
> * under = the terms of  the GNU General 
> Public License as publish= ed by the
> * Free Software Foundation;  either version 2 of> the  License, or (at your
> * option) any later version.<= br>> */
> /dts-v1/;
> / {
> model =3D "MPC8313ERDB";=
> compatible =3D "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
>= #address-cells =3D <1>;
> #size-cells =3D <1>;
>= aliases {
>   ethernet0 =3D &enet0;
>   etherne= t1 =3D &enet1;
>   serial0 =3D &serial0;
>   = serial1 =3D &serial1;
>   pci0 =3D &pci0;
> };> cpus {
>   #address-cells =3D <1>;
>   #= size-cells =3D <0>;
>   PowerPC,8313@0 {
>    device_type =3D "cpu";
>    reg =3D= <0x0>;
>    d-cache-line-size =3D <32>;>    i-cache-line-size =3D <32>;
>  &n= bsp; d-cache-size =3D <16384>;
>    i-cache= -size =3D <16384>;
>    timebase-frequency =3D &= lt;0>; // from
> bootloader
>    bus-frequenc= y =3D <0>;  // from
> bootloader
>    = ;clock-frequency =3D <0>;  //
> from bootloader
> &n= bsp; };
> };
> memory {
>   device_type =3D "memor= y";
>   reg =3D <0x00000000 0x08000000>; // 128MB at 0
= > };
> localbus@e0005000 {
>   #address-cells =3D <= ;2>;
>   #size-cells =3D <1>;
>   compatible= =3D "fsl,mpc8313-elbc", "fsl,elbc",
> "simple-bus";
>   r= eg =3D <0xe0005000 0x1000>;
>   interrupts =3D <77 0x8>;
>   i= nterrupt-parent =3D <&ipic>;
>   // CS0 and CS1 are sw= apped when
>   // booting from nand, but the
>   // a= ddresses are the same.
>   ranges =3D <0x0 0x0 0xfe000000 0x0= 0200000
>             0x1 0x0
> 0= xc0000000 0x02000000
>             0x2 = 0x0
> 0xf0000000 0x00020000
>          = ;   0x3 0x0
> 0xfa000000 0x00008000>;
>   /* remap= ped for our part */
>   flash@0,0 {
>    #a= ddress-cells =3D <1>;
>    #size-cells =3D <1= >;
>    compatible =3D "cfi-flash";
>  &= nbsp; reg =3D <0x0 0x0 0x200000>;
>    bank= -width =3D <2>;
>    device-width =3D <1>;=
>    
>    u-boot@0 {
>   &nb= sp; reg =3D <0x0 0x40000>;
>    };
>  = ;  u-boot-env@40000 {
>     reg =3D <0x40000 0= x10000>;
>    };
>    kernel@5= 0000 {
>     reg =3D <0x50000 0x1A0000>;
> &nbs= p;  };
>    dtb@1F0000 {
>   &nbs= p; reg =3D <0x1f0000 0x10000>;
>    };
> &= nbsp; };
>   /* DCC - remapped for our part */
>   na= nd@1,0 {
>    #address-cells =3D <1>;
> &n= bsp;  #size-cells =3D <1>;
>    compat= ible =3D "fsl,mpc8313-fcm-nand",
>          =      
> "fsl,elbc-fcm-nand";
>   &nbs= p;reg =3D <0x1 0x0 0x02000000>;
>    fs1@0 {
= >     reg =3D <0x0 0x10000000>;
>    };=
>    fs2@10000000 {
>     reg =3D <= ;0x10000000 0x10000000>;
>    };
>   };<= br>> };
> soc8313@e0000000 {
>   #address-cells =3D &= lt;1>;
>   #size-cells =3D <1>;
>   device_t= ype =3D "soc";
>   compatible =3D "simple-bus";
>   r= anges =3D <0x0 0xe0000000 0x00100000>;
>   reg =3D <0xe= 0000000 0x00000200>;
>   bus-frequency =3D <0>;
>=   wdt@200 {
>    device_type =3D "watchdog";
= >    compatible =3D "mpc83xx_wdt";
>   &n= bsp;reg =3D <0x200 0x100>;
>   };
>   /*
>= ;   *  FPGA-TNG device
>   * used 4 external interrupt= s
>   * IRQ0  - magnetec stripe image writer/reader
>=   * IRQ1  - picture image writer
>   * IRQ2  - RFID reade= r  -
>   * IRQ3 - MiniPCI?
>   * IRQ4 - motion d= evices
>   */
>   fpga-tng@f0000000 {
>  &= nbsp; #address-cells =3D <1>;
>    #size-ce= lls =3D <1>;
>    compatible =3D "fpga-tng";
= >    ranges;
>    /* IRQ 0 level */<= br>>    magstripe@00 {
>     device_type = =3D "magstripe";
>     compatible =3D "ms_tng";
> &nb= sp;   reg =3D <0x00 0x4>;
>     interrupts =3D &= lt;48 0x8>;
>     interrupt-parent =3D < &ipic &g= t;;
>    };
>    /* IRQ 1 level *= /
>    tph@5e {
>     device_type =3D = "tph";
>     compatible =3D "tph_tng";
>    = ; reg =3D <0x5e 0x4>;
>     interrupts =3D <17 0x8>;
= >     interrupt-parent =3D < &ipic >;
>  =   };
>    motion@8e {
>     = device_type =3D "motion";
>     compatible =3D "motion_tng"= ;
>     reg =3D <0x8e 0x4>;
>     int= errupts =3D <20 0x8>;
>     interrupt-parent =3D <= &ipic >;
>    };
>   };
> &nb= sp; sleep-nexus {
>    #address-cells =3D <1>;>    #size-cells =3D <1>;
>   &nb= sp;compatible =3D "simple-bus";
>    sleep =3D <&am= p;pmc 0x03000000>;
>    ranges;
>   = ; pit@400 {
>     device_type =3D "pit";
>  = ;   compatible =3D "mpc_pit";
>     reg =3D <0x400 = 0x100>;
>     interrupts =3D <65 0x8>;
>     interru= pt-parent =3D < &ipic >;
>     clock-frequency = =3D <133333330>;
>    };
>   &nb= sp;i2c@3000 {
>     #address-cells =3D <1>;
> &= nbsp;   #size-cells =3D <0>;
>     cell-index = =3D <0>;
>     compatible =3D "fsl-i2c";
> &nbs= p;   reg =3D <0x3000 0x100>;
>     interrupts = =3D <14 0x8>;
>     interrupt-parent =3D <&ipi= c>;
>     dfsrr;
>     sensor@48 {
&g= t;      compatible =3D "national,lm75";
>   =    reg =3D <0x48>;
>     };
> &n= bsp;   rtc@68 {
>      compatible =3D "dalla= s,ds1339";
>      reg =3D <0x68>;
> &= nbsp;   };
>        
>    };
> &nbs= p;  spi@7000 {
>     device_type =3D "spi";
&g= t;     cell-index =3D <0>;
>     compatible= =3D
> "fsl,spi","fsl,mpc83xx-spi","fsl,mpc83xx_spi";
>   =   reg =3D <0x7000 0x1000>;
>     interrupts =3D = <21 0x8>;
>     interrupt-parent =3D <&ipic>= ;;
>     mode =3D "cpu";
>    
> &nb= sp;   fsl_m25p80@0 {
>      compatible =3D "= fsl,spi";
>      reg =3D <0>;
>  = ;    voltage-ranges =3D <3300
> 3300>;
> &= nbsp;    spi-max-frequency =3D
> <6000000>;
&= gt;     }; 
>    };
>  &nb= sp; crypto@30000 {
>     compatible =3D "fsl,sec2.2", "fsl,sec2.1",
>              
= >    "fsl,sec2.0";
>     reg =3D <0x30= 000 0x10000>;
>     interrupts =3D <11 0x8>;
&g= t;     interrupt-parent =3D <&ipic>;
>   &nb= sp; fsl,num-channels =3D <1>;
>     fsl,channel-fifo-= len =3D <24>;
>     fsl,exec-units-mask =3D <0x4c&= gt;;
>     fsl,descriptor-types-mask =3D
> <0x0122= 003f>;
>    };
>   };
>   i2c= @3100 {
>    #address-cells =3D <1>;
> &nb= sp;  #size-cells =3D <0>;
>    cell-in= dex =3D <1>;
>    compatible =3D "fsl-i2c";
&= gt;    reg =3D <0x3100 0x100>;
>   &nb= sp;interrupts =3D <15 0x8>;
>    interrupt-paren= t =3D <&ipic>;
>    dfsrr;
>   };
&= gt;   spi@7000 {
>    device_type =3D "spi";
&= gt;    cell-index =3D <0>;
>    c= ompatible =3D
> "fsl,spi","fsl,mpc83xx_spi";
>   &nbs= p;reg =3D <0x7000 0x1000>;
>    interrupts =3D &= lt;16 0x8>;
>    interrupt-parent =3D <&ipic= >;
>    mode =3D "cpu";
>    <= br>>    mp85p20@0 {
>      comp= atible =3D "fsl,spi";
>      reg =3D <0>;>      voltage-ranges =3D <3300
> 3300>= ;;
>      spi-max-frequency =3D
> <60000= 00>;
>    };   
>   };
>= ;   dma@82a8 {
>    #address-cells =3D <1>;=
>    #size-cells =3D <1>;
>    com= patible =3D "fsl,mpc8313-dma",
> "fsl,elo-dma";
>   &= nbsp;reg =3D <0x82a8 4>;
>    ranges =3D <0 0= x8100 0x1a8>;
>    interrupt-parent =3D <&ip= ic>;
>    interrupts =3D <71 8>;
> &nbs= p;  cell-index =3D <0>;
>    dma-chann= el@0 {
>     compatible =3D "fsl,mpc8313-dma-channel",
&= gt; "fsl,elo-dma-channel";
>     reg =3D <0 0x80>;>     interrupt-parent =3D <&ipic>;
>   =   interrupts =3D <71 8>;
>    };
> &n= bsp;  dma-channel@80 {
>     compatible =3D "fsl,= mpc8313-dma-channel",
> "fsl,elo-dma-channel";
>     = reg =3D <0x80 0x80>;
>     interrupt-parent =3D <&= amp;ipic>;
>     interrupts =3D <71 8>;
>    };>    dma-channel@100 {
>     compatible = =3D "fsl,mpc8313-dma-channel",
> "fsl,elo-dma-channel";
>  = ;   reg =3D <0x100 0x80>;
>     interrupt-parent= =3D <&ipic>;
>     interrupts =3D <71 8>;<= br>>    };
>    dma-channel@180 {>     compatible =3D "fsl,mpc8313-dma-channel",
> "fsl,= elo-dma-channel";
>     reg =3D <0x180 0x28>;
>=     interrupt-parent =3D <&ipic>;
>    = ; interrupts =3D <71 8>;
>    };
>   = };
>   /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
> &n= bsp; usb@23000 {
>    compatible =3D "fsl-usb2-dr";>    reg =3D <0x23000 0x1000>;
>    #address-cells =3D <1>;
>    = #size-cells =3D <0>;
>    interrupt-parent =3D &= lt;&ipic>;
>    interrupts =3D <38 0x8>;<= br>>    phy_type =3D "utmi_wide";
>   &nb= sp;dr_mode =3D "peripheral";
>    sleep =3D <&p= mc 0x00300000>;
>   };
>   enet0: ethernet@24000 {=
>    #address-cells =3D <1>;
>  &nbs= p; #size-cells =3D <1>;
>    sleep =3D <= &pmc 0x20000000>;
>    ranges;
>  &n= bsp; cell-index =3D <0>;
>    device_type = =3D "network";
>    model =3D "eTSEC";
>  &= nbsp; compatible =3D "gianfar", "simple-bus";
>   &nbs= p;reg =3D <0x24000 0x1000>;
>    local-mac-addre= ss =3D [ 00 00 00 00 00 00
> ];
>    interrupts =3D <32 0x8 33 0x8 3= 4
> 0x8>;
>    interrupt-parent =3D <&= ipic>;
>    phy-handle =3D < &phy3 >;
= >    fsl,magic-packet;
>    mdio@245= 20 {
>     #address-cells =3D <1>;
>   &nb= sp; #size-cells =3D <0>;
>     compatible =3D "fsl,gi= anfar-mdio";
>     reg =3D <0x24520 0x20>;
> &n= bsp;   phy3: ethernet-phy@3 {
>      interru= pt-parent =3D
> <&ipic>;
>      r= eg =3D <0x3>;
>      device_type =3D "ether= net-phy";
>     };
>     phy1: ethernet-phy= @1 {
>      interrupt-parent =3D
> <&= ;ipic>;
>      reg =3D <0x1>;
> &n= bsp;    device_type =3D "ethernet-phy";
>     };=
>    };
>   };
>   enet1: ether= net@25000 {
>    cell-index =3D <1>;
> &nb= sp;  device_type =3D "network";
>    model = =3D "eTSEC";
>    compatible =3D "gianfar";
> &n= bsp;  reg =3D <0x25000 0x1000>;
>    l= ocal-mac-address =3D [ 00 00 00 00 00 00
> ];
>   &nb= sp;interrupts =3D <35 0x8 36 0x8 37
> 0x8>;
>   = ; interrupt-parent =3D <&ipic>;
>    ph= y-handle =3D < &phy1 >;
>    sleep =3D <&= amp;pmc 0x10000000>;
>    fsl,magic-packet;
>=   };
>   serial0: serial@4500 {
>    = cell-index =3D <0>;
>    device_type =3D "serial= ";
>    compatible =3D "ns16550";
>    reg = =3D <0x4500 0x100>;
>    clock-frequency =3D <= ;0>;
>    interrupts =3D <9 0x8>;
> &nb= sp;  interrupt-parent =3D <&ipic>;
>   };>   serial1: serial@4600 {
>    cell-index = =3D <1>;
>    device_type =3D "serial";
> =    compatible =3D "ns16550";
>    reg = =3D <0x4600 0x100>;
>    clock-frequency =3D <= ;0>;
>    interrupts =3D <10 0x8>;
> &n= bsp;  interrupt-parent =3D <&ipic>;
>   };>   /* IPIC
>    * interrupts cell =3D <i= ntr #,
> sense>
>    * sense values match lin= ux
> IORESOURCE_IRQ_* defines:
>    * sense =3D= =3D 8: Level, low assertion
>    * sense =3D=3D 2: Edge, high-to-low ch= ange
>    */
>   ipic: pic@700 {
> &n= bsp;  interrupt-controller;
>    #address-ce= lls =3D <0>;
>    #interrupt-cells =3D <2>= ;
>    reg =3D <0x700 0x100>;
>  &nbs= p; device_type =3D "ipic";
>   };
>   pmc: power= @b00 {
>    compatible =3D "fsl,mpc8313-pmc",
> = "fsl,mpc8349-pmc";
>    reg =3D <0xb00 0x100 0xa00 = 0x100>;
>    interrupts =3D <80 8>;
> &= nbsp;  interrupt-parent =3D <&ipic>;
>  &nbs= p; fsl,mpc8313-wakeup-timer =3D
> <&gtm1>;
> &nb= sp;  /* Remove this (or change to "okay") if
> you have
= >     * a REVA3 or later board, if you apply one of
> th= e
>     * workarounds listed in section 8.5 of the
> board
= >     * manual, or if you are adapting this device
> tre= e
>     * to a different board.
>     */>    status =3D "fail";
>   };
>  = gtm1: timer@500 {
>    compatible =3D "fsl,mpc8313-gt= m",
> "fsl,gtm";
>    reg =3D <0x500 0x100>= ;;
>    interrupts =3D <90 8 78 8 84 8 72
> 8= >;
>    interrupt-parent =3D <&ipic>;
= >   };
>   timer@600 {
>    compati= ble =3D "fsl,mpc8313-gtm",
> "fsl,gtm";
>    reg= =3D <0x600 0x100>;
>    interrupts =3D <91 8= 79 8 85 8 73
> 8>;
>    interrupt-parent =3D= <&ipic>;
>   };
> };
> sleep-nexus {>   #address-cells =3D <1>;
>   #size-cells =3D <1&= gt;;
>   compatible =3D "simple-bus";
>   sleep =3D &= lt;&pmc 0x00010000>;
>   ranges;
>   pci0: pci= @e0008500 {
>    cell-index =3D <1>;
> &nb= sp;  interrupt-map-mask =3D <0xf800 0x0 0x0
> 0x7>;>    interrupt-map =3D <
>     =  /* IDSEL 0x0E -mini PCI */
>       0x7000 0x0 0x= 0 0x1 &ipic 18 0x8
>       0x7000 0x0 0x0 0x2 &= ;ipic 18 0x8
>       0x7000 0x0 0x0 0x3 &ipic 18 0= x8
>       0x7000 0x0 0x0 0x4 &ipic 18 0x8
>=      /* IDSEL 0x0F - PCI slot */
>    =   0x7800 0x0 0x0 0x1 &ipic 17 0x8
>       0x= 7800 0x0 0x0 0x2 &ipic 18 0x8
>       0x7800 0x0 0= x0 0x3 &ipic 17 0x8
>       0x7800 0x0 0x0 0x4 &ipic= 18
> 0x8>;
>    interrupt-parent =3D <&am= p;ipic>;
>    interrupts =3D <66 0x8>;
>= ;    bus-range =3D <0x0 0x0>;
>   &nbs= p;ranges =3D <0x02000000 0x0 0x90000000
> 0x90000000 0x0 0x1000000= 0
>       0x42000000 0x0 0x80000000 0x80000000
>= 0x0 0x10000000
>       0x01000000 0x0 0x00000000 0xe2= 000000
> 0x0 0x00100000>;
>    clock-frequenc= y =3D <66666666>;
>    #interrupt-cells =3D <= 1>;
>    #size-cells =3D <2>;
>  &= nbsp; #address-cells =3D <3>;
>    reg =3D = <0xe0008500 0x100>;
>    compatible =3D "fsl,mpc= 8349-pci";
>    device_type =3D "pci";
>   = };
>=20 };
> };
>
>
>
>      
= >

=0A=0A=0A=0A --0-1869651894-1254413989=:44242-- --===============5510591180539265612== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ devicetree-discuss mailing list devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org https://lists.ozlabs.org/listinfo/devicetree-discuss --===============5510591180539265612==--