From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4586C374A1E; Tue, 9 Jun 2026 19:51:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781034684; cv=none; b=fB0NN34KWLWGz9uuEr4gxmdtkQLB2RmNhlunnR2Uws2GbjBc0Lj78o04h1NWIrver2RXOhk12m2od7OsGxQh8UaedJ08VuOYAydgP6sbuxLPD0bujjkFR9Lhdx8pE68PVO1pIBapzvAPLw6Sp/+DwbiYUJ+rwL3aWI0IzGXQOiw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781034684; c=relaxed/simple; bh=vMyOOIGOAJsdIqCGloHoKrEpv78+bdnXCx7uXU5nR7Y=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=jLKN0jLKCCxd9DKP+ZoxDKVp2WQ+/eWtEr0vd5PWFTyuqMJjSuwWMgiynjmKESx3EikfPhKLMVUFjMWGMvxVE2q/AQblicRIiVD1K9htksL9JyFqF9OKhIv4zEp9nHCA7qIf+NN296gTMeUHjFVCkKi6CNZ9p1vBv4x2XWwhSFE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dziBB5dH; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dziBB5dH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C22091F00893; Tue, 9 Jun 2026 19:51:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781034678; bh=QMeBqfIANjuB2z0BodQbfcwU2KdM59UZ/QBGLC1c+2k=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=dziBB5dHsa7EnBkYvZDTTxHglDhPLrVZO5+5Ty/q/KUfuf/21PM2gnqk5xIzBahWF AuRqNBEiYUEO3IhT9ELTw07O66FMMRYXMvm0QyJQLmfNuyCHKDnpHj3QZO4TtPeB+0 i4og588mJkrYb/mqVF9EZoHg2E+e+x6f+twDCqi+8KVVjCanGfmI7epCqf0AiR7yAt t/A3BWzKnUDpgdSPP4Ir3rziUxvasVpFbTrX+GMcchlxxXOU4Ln0t5WYs7PMfG0IFl S6YpNpk3xeGIhCQ0dtw4ikZuCkeL2vYsbD/gUnwRvGiqFbPJCHdI5YRC8z1jh+zi46 end+eultxPHqA== Message-ID: <132bb73c-b98d-41aa-a8bb-0f93abbd408b@kernel.org> Date: Tue, 9 Jun 2026 21:51:13 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 5/8] can: flexcan: add FLEXCAN_QUIRK_IRQ_BERR quirk To: Ciprian Costea , Marc Kleine-Budde , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Fabio Estevam Cc: Pengutronix Kernel Team , linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Eric Chanudet , Larisa Grigore , Haibo Chen References: <20260609142954.1807421-1-ciprianmarian.costea@oss.nxp.com> <20260609142954.1807421-6-ciprianmarian.costea@oss.nxp.com> From: Vincent Mailhol Content-Language: en-US Autocrypt: addr=mailhol@kernel.org; keydata= xjMEZluomRYJKwYBBAHaRw8BAQdAf+/PnQvy9LCWNSJLbhc+AOUsR2cNVonvxhDk/KcW7FvN JFZpbmNlbnQgTWFpbGhvbCA8bWFpbGhvbEBrZXJuZWwub3JnPsKZBBMWCgBBFiEE7Y9wBXTm fyDldOjiq1/riG27mcIFAmdfB/kCGwMFCQp/CJcFCwkIBwICIgIGFQoJCAsCBBYCAwECHgcC F4AACgkQq1/riG27mcKBHgEAygbvORJOfMHGlq5lQhZkDnaUXbpZhxirxkAHwTypHr4A/joI 2wLjgTCm5I2Z3zB8hqJu+OeFPXZFWGTuk0e2wT4JzjgEZx4y8xIKKwYBBAGXVQEFAQEHQJrb YZzu0JG5w8gxE6EtQe6LmxKMqP6EyR33sA+BR9pLAwEIB8J+BBgWCgAmFiEE7Y9wBXTmfyDl dOjiq1/riG27mcIFAmceMvMCGwwFCQPCZwAACgkQq1/riG27mcJU7QEA+LmpFhfQ1aij/L8V zsZwr/S44HCzcz5+jkxnVVQ5LZ4BANOCpYEY+CYrld5XZvM8h2EntNnzxHHuhjfDOQ3MAkEK In-Reply-To: <20260609142954.1807421-6-ciprianmarian.costea@oss.nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09/06/2026 at 16:29, Ciprian Costea wrote: > From: Ciprian Marian Costea > > Introduce FLEXCAN_QUIRK_IRQ_BERR quirk to handle hardware integration > where the FlexCAN module has a dedicated interrupt line for signaling > bus errors and device state changes. > > This adds the flexcan_irq_esr() handler which composes > flexcan_do_state() and flexcan_do_berr() to handle platforms where > these events share a single IRQ line. > > Also extend flexcan_chip_interrupts_enable() to disable/enable the > new IRQ line during IMASK register writes. > > This is required for NXP S32N79 SoC support. > > Co-developed-by: Larisa Grigore > Signed-off-by: Larisa Grigore > Signed-off-by: Ciprian Marian Costea > Reviewed-and-tested-by: Haibo Chen > Tested-by: Enric Balletbo i Serra Reviewed-by: Vincent Mailhol > --- > drivers/net/can/flexcan/flexcan-core.c | 54 +++++++++++++++++++++----- > drivers/net/can/flexcan/flexcan.h | 2 + > 2 files changed, 47 insertions(+), 9 deletions(-) > > diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c > index 0ed838f0719a..adf3af57fb0a 100644 > --- a/drivers/net/can/flexcan/flexcan-core.c > +++ b/drivers/net/can/flexcan/flexcan-core.c > @@ -1300,6 +1300,22 @@ static irqreturn_t flexcan_irq_boff(int irq, void *dev_id) > return handled; > } > > +/* Combined bus error and state change IRQ handler */ > +static irqreturn_t flexcan_irq_esr(int irq, void *dev_id) > +{ > + struct net_device *dev = dev_id; > + struct flexcan_priv *priv = netdev_priv(dev); > + irqreturn_t handled; > + > + handled = flexcan_do_state(dev); > + handled |= flexcan_do_berr(dev); > + > + if (handled) > + can_rx_offload_irq_finish(&priv->offload); > + > + return handled; > +} > + > static void flexcan_set_bittiming_ctrl(const struct net_device *dev) > { > const struct flexcan_priv *priv = netdev_priv(dev); > @@ -1540,10 +1556,10 @@ static void flexcan_chip_interrupts_enable(const struct net_device *dev) > u64 reg_imask; > > disable_irq(dev->irq); > - if (quirks & FLEXCAN_QUIRK_NR_IRQ_3) { > + if (quirks & FLEXCAN_QUIRK_NR_IRQ_3) > disable_irq(priv->irq_boff); > + if (quirks & (FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_IRQ_BERR)) > disable_irq(priv->irq_err); > - } > if (quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) > disable_irq(priv->irq_secondary_mb); > > @@ -1554,10 +1570,10 @@ static void flexcan_chip_interrupts_enable(const struct net_device *dev) > enable_irq(dev->irq); > if (quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) > enable_irq(priv->irq_secondary_mb); > - if (quirks & FLEXCAN_QUIRK_NR_IRQ_3) { > - enable_irq(priv->irq_boff); > + if (quirks & (FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_IRQ_BERR)) > enable_irq(priv->irq_err); > - } > + if (quirks & FLEXCAN_QUIRK_NR_IRQ_3) > + enable_irq(priv->irq_boff); > } > > static void flexcan_chip_interrupts_disable(const struct net_device *dev) > @@ -1881,7 +1897,8 @@ static int flexcan_open(struct net_device *dev) > > can_rx_offload_enable(&priv->offload); > > - if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) > + if (priv->devtype_data.quirks & > + (FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_IRQ_BERR)) > err = request_irq(dev->irq, flexcan_irq_mb, > IRQF_SHARED, dev->name, dev); > else > @@ -1902,6 +1919,13 @@ static int flexcan_open(struct net_device *dev) > goto out_free_irq_boff; > } > > + if (priv->devtype_data.quirks & FLEXCAN_QUIRK_IRQ_BERR) { > + err = request_irq(priv->irq_err, > + flexcan_irq_esr, IRQF_SHARED, dev->name, dev); > + if (err) > + goto out_free_irq_boff; > + } > + > if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) { > err = request_irq(priv->irq_secondary_mb, > flexcan_irq_mb, IRQF_SHARED, dev->name, dev); > @@ -1916,7 +1940,8 @@ static int flexcan_open(struct net_device *dev) > return 0; > > out_free_irq_err: > - if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) > + if (priv->devtype_data.quirks & > + (FLEXCAN_QUIRK_IRQ_BERR | FLEXCAN_QUIRK_NR_IRQ_3)) > free_irq(priv->irq_err, dev); > out_free_irq_boff: > if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) > @@ -1948,10 +1973,12 @@ static int flexcan_close(struct net_device *dev) > if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ) > free_irq(priv->irq_secondary_mb, dev); > > - if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) { > + if (priv->devtype_data.quirks & > + (FLEXCAN_QUIRK_IRQ_BERR | FLEXCAN_QUIRK_NR_IRQ_3)) > free_irq(priv->irq_err, dev); > + > + if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) > free_irq(priv->irq_boff, dev); > - } > > free_irq(dev->irq, dev); > can_rx_offload_disable(&priv->offload); > @@ -2338,12 +2365,21 @@ static int flexcan_probe(struct platform_device *pdev) > if (transceiver) > priv->can.bitrate_max = transceiver->attrs.max_link_rate; > > + if (priv->devtype_data.quirks & FLEXCAN_QUIRK_IRQ_BERR) { > + priv->irq_err = platform_get_irq_byname(pdev, "berr"); > + if (priv->irq_err < 0) { > + err = priv->irq_err; > + goto failed_platform_get_irq; > + } > + } > + > if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) { > priv->irq_boff = platform_get_irq(pdev, 1); > if (priv->irq_boff < 0) { > err = priv->irq_boff; > goto failed_platform_get_irq; > } > + Nitpick: you shouldn't have unrelated changes, like this newline addition, in you patches. @Marc, do you mind removing this while applying? > priv->irq_err = platform_get_irq(pdev, 2); > if (priv->irq_err < 0) { > err = priv->irq_err; > diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h > index 16692a2502eb..bbb1a8dd4777 100644 > --- a/drivers/net/can/flexcan/flexcan.h > +++ b/drivers/net/can/flexcan/flexcan.h > @@ -74,6 +74,8 @@ > * both need to have an interrupt handler registered. > */ > #define FLEXCAN_QUIRK_SECONDARY_MB_IRQ BIT(18) > +/* Setup dedicated bus error and state change IRQ */ > +#define FLEXCAN_QUIRK_IRQ_BERR BIT(19) > > struct flexcan_devtype_data { > u32 quirks; /* quirks needed for different IP cores */ Yours sincerely, Vincent Mailhol