From: Axel Lin <axel.lin@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Liam Girdwood <lrg@ti.com>,
Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: [PATCH RFT 2/2] regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting
Date: Fri, 23 Mar 2012 06:27:10 +0800 [thread overview]
Message-ID: <1332455230.2948.3.camel@phoenix> (raw)
In-Reply-To: <1332455105.2948.1.camel@phoenix>
DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register.
WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0.
Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
---
drivers/regulator/wm8350-regulator.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c
index 1c54821..ff34654 100644
--- a/drivers/regulator/wm8350-regulator.c
+++ b/drivers/regulator/wm8350-regulator.c
@@ -575,13 +575,13 @@ static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
- WM8350_DC2_HIB_MODE_ACTIVE);
+ (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
break;
case WM8350_DCDC_5:
val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
- & ~WM8350_DC2_HIB_MODE_MASK;
+ & ~WM8350_DC5_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
- WM8350_DC5_HIB_MODE_ACTIVE);
+ (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
break;
default:
return -EINVAL;
@@ -600,13 +600,13 @@ static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
- WM8350_DC2_HIB_MODE_DISABLE);
+ (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
break;
case WM8350_DCDC_5:
val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
- & ~WM8350_DC2_HIB_MODE_MASK;
+ & ~WM8350_DC5_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
- WM8350_DC2_HIB_MODE_DISABLE);
+ (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
break;
default:
return -EINVAL;
--
1.7.5.4
next prev parent reply other threads:[~2012-03-22 22:27 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-22 22:25 [PATCH RFT 1/2] regulator: Fix restoring pmic.dcdcx_hib_mode settings in wm8350_dcdc_set_suspend_enable Axel Lin
2012-03-22 22:27 ` Axel Lin [this message]
2012-03-26 17:35 ` Mark Brown
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