From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF Date: Fri, 30 Mar 2012 17:15:08 +0100 Message-ID: <1333124127_158564@CP5-2952> References: <1332428450-13348-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 671B89E7FE for ; Fri, 30 Mar 2012 09:15:35 -0700 (PDT) In-Reply-To: <1332428450-13348-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: stable@kernel.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 22 Mar 2012 15:00:50 +0000, Chris Wilson wrote: > Quoting the BSpec from time immemorial: > > PIPEACONF, bits 28:27: Frame Start Delay (Debug) > > Used to delay the frame start signal that is sent to the display planes. > Care must be taken to insure that there are enough lines during VBLANK > to support this setting. > > An instance of the BIOS leaving these bits set was found in the wild, > where it caused our modesetting to go all squiffy and skewiff. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=47271 > Signed-off-by: Chris Wilson > Cc: stable@kernel.org Reported-and-tested-by: Carl Richell Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43012 -Chris -- Chris Wilson, Intel Open Source Technology Centre