From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: re-run init_clock_gating after gpu reset Date: Tue, 10 Apr 2012 13:53:56 +0100 Message-ID: <1334062437_345528@CP5-2952> References: <1334061589-28871-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id DD5549E7FE for ; Tue, 10 Apr 2012 05:54:03 -0700 (PDT) In-Reply-To: <1334061589-28871-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Tue, 10 Apr 2012 14:39:49 +0200, Daniel Vetter wrote: > Over time we've added more and more workarounds in there for render > core issues, so these register settings will revert back to their > reset state. To avoid making a bad situation worse, re-run the clock > gating code after reset so that we don't crash right away with a known > hw issue. > > Signed-Off-by: Daniel Vetter This shouldn't do any harm whilst we do a full modeset afterwards. However, we also need to reset rc6 and contexts. -Chris -- Chris Wilson, Intel Open Source Technology Centre