From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: Archit Taneja <archit@ti.com>
Cc: linux@arm.linux.org.uk, tony@atomide.com,
linux-omap@vger.kernel.org, santosh.shilimkar@ti.com,
paul@pwsan.com, b-cousson@ti.com
Subject: Re: [PATCH] ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
Date: Wed, 18 Apr 2012 11:06:26 +0300 [thread overview]
Message-ID: <1334736386.1886.8.camel@deskari> (raw)
In-Reply-To: <1333955479-2675-1-git-send-email-archit@ti.com>
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Hi,
On Mon, 2012-04-09 at 12:41 +0530, Archit Taneja wrote:
> This reverts commit 46f8c3c7e95c0d30d95911e7975ddc4f93b3e237.
>
> The commit above swapped the DSI1_PPID and DSI2_PPID register fields in
> CONTROL_DSIPHY to be in sync with the newer public OMAP TRMs(after version V).
>
> With this commit, contention errors were reported on DSI lanes some OMAP4 SDPs.
> After probing the DSI lanes on OMAP4 SDP, it was seen that setting bits in the
> DSI2_PPID field was pulling up voltage on DSI1 lanes, and DSI1_PPID field was
> pulling up voltage on DSI2 lanes.
>
> This proves that the current version of OMAP4 TRM is incorrect, swap the
> position of register fields according to the older TRM versions as they were
> correct.
Are we sure the bits are the same for all OMAP4 versions? I'm just
wondering why the change was made to TRM...
Tomi
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next prev parent reply other threads:[~2012-04-18 8:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-09 7:11 [PATCH] ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields" Archit Taneja
2012-04-09 23:02 ` Tony Lindgren
2012-04-18 8:06 ` Tomi Valkeinen [this message]
2012-04-18 8:13 ` Archit Taneja
2012-04-19 9:31 ` Russell King - ARM Linux
2012-04-19 11:05 ` Tomi Valkeinen
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